I have created what I thought was a direct mapping of all items in the Vybrid memory map (virtual address = physical address) [LOTS of typing!]. I am running in bare-metal mode, no Linux. I have no interest in the MMU and would have preferred to ignore it and keep it disabled; however, loading and enabling the MMU is required to be able to use L2 cache...so in I went, and it works, and runs much faster.
The translation works fine for sysRAM0, sysRAM1, and GPIOs. I recently added a few UART register writes and it hangs my system. I disabled the MMU translation and it works fine, so I'm assuming that the UART register access is causing an MMU violation (unrecognized address).
I've stared at it quite a bit and triple checked it and I can't find the bug. Attached is the code.
I suppose I could define an extremely simple L1 that just maps a single block, the entire chip's address space, but I really would like to maintain the trapping of execution of invalid addresses as opposed to debugging random behavior related to hitting undefined addresses.
Is anyone else running in bare metal mode?
Thanks for any help, Chris
Original Attachment has been moved to: MMU_init_code_fragment.c.zip
Original Attachment has been moved to: ttbl.h.zip
Original Attachment has been moved to: ttbl-Vybrid.c.zip