I am trying to route the output of the PLL to clock the UART0. In the ref manual, chapter 5 page 117, clocking options for UART0 are shown as below:
But I could not find PLLFLLSEL bits in the SIM_SOPT2. The description of SIM_SOPT2 is shown as below (Section 12.2.3 page 186):
Anyone know are these bits implemented for KL15 chips?