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KL15: Missing [PLLFLLSEL] bits in SIM_SOPT2?

Question asked by Safwat on Apr 23, 2013
Latest reply on Jul 19, 2013 by markosiponen

I am trying to route the output of the PLL to clock the UART0. In the ref manual, chapter 5 page 117, clocking options for UART0 are shown as below:


UART CLock.png


But I could not find PLLFLLSEL bits in the SIM_SOPT2. The description of SIM_SOPT2 is shown as below (Section 12.2.3 page 186):


New Picture.bmp


Anyone know are these bits implemented for KL15 chips?