PeterChan

i.MX28: BCH error in L2.6.35_1.1.0_130130

Discussion created by PeterChan Employee on Apr 11, 2013
Latest reply on Sep 19, 2014 by PeterChan

In case you have the NAND driver enabled in Linux BSP release L2.6.35_1.1.0_130130 and experience BCH timeout error on i.MX28, please try this patch.

 

--- a/drivers/mtd/nand/gpmi-nfc/gpmi-nfc-hal-v1.c

+++ b/drivers/mtd/nand/gpmi-nfc/gpmi-nfc-hal-v1.c

@@ -46,8 +46,15 @@ static int init(struct gpmi_nfc_data *this)

        clk_enable(resources->clock);

 

 

        /* Reset the GPMI block. */

-

-       mxs_reset_block(resources->gpmi_regs + HW_GPMI_CTRL0, false);

+   /*

+    * Reset the BCH block. Notice that we pass in true for the just_enable

+    * flag. This is because the soft reset for the version 0 BCH block

+    * doesn't work and the version 1 BCH block is similar enough that we

+    * suspect the same (though this has not been officially tested). If you

+    * try to soft reset a version 0 BCH block, it becomes unusable until

+    * the next hard reset.

+    */

+       mxs_reset_block(resources->gpmi_regs + HW_GPMI_CTRL0, true);

 

 

        /* Choose NAND mode. */

        __raw_writel(BM_GPMI_CTRL1_GPMI_MODE,

@@ -108,7 +115,15 @@ static int set_geometry(struct gpmi_nfc_data *this)

        clk_enable(resources->clock);

 

 

        /* reset the BCH */

-       mxs_reset_block(resources->bch_regs, false);

+   /*

+    * Reset the BCH block. Notice that we pass in true for the just_enable

+    * flag. This is because the soft reset for the version 0 BCH block

+    * doesn't work and the version 1 BCH block is similar enough that we

+    * suspect the same (though this has not been officially tested). If you

+    * try to soft reset a version 0 BCH block, it becomes unusable until

+    * the next hard reset.

+    */

+       mxs_reset_block(resources->bch_regs, true);

 

 

        /* Configure layout 0. */

 

 

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