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9s08qg8 FLL Engaged Internal (FEI)

Question asked by Wolfgang Schwertner on Apr 6, 2013
Latest reply on Apr 17, 2013 by Encoder1

Hello I was hoping someone could help me debug my short code.  I am developing on the demo9s08qg8.  I would like to use my 9s08 on a breadboard but so far I am unsuccessful.  I think my problem is mainly setting up a proper clock.  I would like to use the FFL Engaged Internal (FEI) clock mode.  From every document available I understand this allows no additional components to be required for generating a clock, such as a crystal and its capacitors (please correct me if I am wrong).  After I try to set up the clock all I want to do is use parallel ports and timer.  Here is my attempt.  I assume to make my origin $E000 because that is where flash begins even though code warrior prompts me that it will reprogram FLASH every debug.  Thanks for the help.


; Include derivative-specific definitions

            INCLUDE ''

            XDEF _Startup, main



                ORG    $E000        ;FLASH BEGINS

                MOV    #$3F,ICSC1    ;SET CORE CLOCK 16.38KHZ

                MOV    #$00,ICSC2

                LDX     #$F6

                STX      PTAPE      ;ENABLE PULL UP RESISTORS   

                MOV    #$FF,PTBDD    ;DATA DIRECTION B

                MOV    #$09,PTADD    ;DATA DIRECTION A

LOOP      MOV    #$09,PTAD        ;PA0 & PA3 ON, PA1 & PA2 OFF

                JSR     TIMER               ;TIME DELAY

                MOV    #$00,PTAD      ;PORTA OFF

                BRA     LOOP



                MOV    #$9A,MTIMMOD    ;DECIMAL 154

                MOV    #$60,MTIMSC    ;TSCR1


                BSET    7,MTIMSC         


One last small thing I would like to ask is I had this strange alert in codewarrior and it may have something to do with my problem.  I have attached the alert.  I just click yes and it seems to work fine.