RTC and LLS, KL15Z128

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RTC and LLS, KL15Z128

1,357 Views
serjnone
Contributor I

Hello. I have some problems with using RTC for wakeup from LLS. I am use KL15Z128 processor

//-----------------------------------------------------

void main(void)

  __disable_interrupt();

  SIM_COPC = 0x00; /* Disable the watchdog timer */

 

  unsigned int res = fei_fee_my();

  change_core_prs(0); //max frq

 

  LPTMRInit(0); //init and stop LPTR

  rtc_init(0, 0); //init RTC

 

  LLWU_Init(); //init LLWU wakeup by button, LPTR, RTC

  PITInit(periph_clk, PIT_PERIOD_US); //PIT period 1000 uS

  UART0_init(FLL_FRQ_OUT, 115200); //debug uart

   

  PutStringDebug("Low Power Modes Test\r\n");

 

  displaySDID(); //display SIM_SDID and SIM_FCFG1

 

  PutStringDigitDebug("FEI to FEE RES: ", res);

  PutStringDigitDebug("MCG MODE: ", what_mcg_mode());

  rtc_set_alarm(10); //set first rtc alarm at 10 sec

 

  while(1)

  {

    if(gFlags.rtcAlarmFlag) rtc_set_alarm(10); //reinit rtc alarm

   

    if(_getcharDebug() == 's')

    {

      PutStringDebug("Press SW to wake up from LLS\r\n");

      delay_ms(10);   

           

      unsigned int fee_fbe_res = fee_fbe_my();   

      unsigned int fbe_blpe_res = fbe_blpe_my(); 

               

      gFlags.llwuMSK = 0;     

     

      rtc_set_alarm(10); //set rtc alarm fo wakeup from lls at 10 sec

      LPTMRInit(15000); //set LPTR for wakeup from lls at 15 sec

      LPTMRStart();

     

      __enable_interrupt();

    

     enter_lls(); //enter LLS

      LPTMRStop(); //stop LPTR

      unsigned int blpe_fbe_res = blpe_fbe_my();

      res = fbe_fee_my();

      change_core_prs(0); //max frq

    

     PITInit(periph_clk, PIT_PERIOD_US); //PIT period 1000 uS

      UART0_init(FLL_FRQ_OUT, 115200); //init debug-uart

     

     

      PutStringDebug("Exit From Low Power Mode\r\n");

      PutStringDigitDebug("FEE to FBE RES: ", fee_fbe_res);

      PutStringDigitDebug("FBE to FEE RES: ", res);

      PutStringDigitDebug("MCG MODE: ", what_mcg_mode());

      PutStringDigitDebug("LLWU FLAG: ", gFlags.llwuMSK);

      PutStringDigitDebug("LLWU F1: ", LLWU_F1);

      PutStringDigitDebug("LLWU F2: ", LLWU_F2);

      PutStringDigitDebug("LLWU F3: ", LLWU_F3);   

     

     

      gFlags.llwuMSK = 0;

    }

  }

//------------------------------------------

//------------------------------------------

void RTCA_IRQHandler(void)

{

  if((RTC_SR & RTC_SR_TIF_MASK)== 0x01)

  {

    PutStringStringDebug(0, "SRTC time invalid interrupt entered...\r\n");

    RTC_SR &= 0x07;  //clear TCE, or RTC_TSR can  not be written

    RTC_TSR = 0x00000000;  //clear TIF

  }   

  else if((RTC_SR & RTC_SR_TOF_MASK) == 0x02)

  {

    PutStringStringDebug(0, "SRTC time overflow interrupt entered...\r\n");

    RTC_SR &= 0x07;  //clear TCE, or RTC_TSR can  not be written

    RTC_TSR = 0x00000000;  //clear TOF

  }

  else if((RTC_SR & RTC_SR_TAF_MASK) == 0x04)

  {

    PutStringDigitDebug("SRTC alarm interrupt entered: ", RTC_TSR);

    RTC_TAR = 0xffffffff;// Write new alarm value, to generate an alarm every second add 1

    gFlags.rtcAlarmFlag = 1;

  }

}

//------------------------------------------

FAMID: 0010 KL2x Family (USB)

11:30:42.848> SUBFAMID:


void rtc_init(unsigned char c_interval, unsigned char c_value)

  /*enable the clock to SRTC module register space*/

  SIM_SCGC6 |= SIM_SCGC6_RTC_MASK;

 

  /*Only VBAT_POR has an effect on the SRTC, RESET to the part does not, so you must manually reset the SRTC to make sure everything is in a known state*/

  /*clear the software reset bit*/

  RTC_CR  = RTC_CR_SWR_MASK;

  RTC_CR  &= ~RTC_CR_SWR_MASK; 

  RTC_CR |= RTC_CR_UM_MASK | RTC_CR_SUP_MASK;

  install_irq(RTCA_irq_no, RTCA_prio);

 

   /*Set time compensation parameters*/

  RTC_TCR = RTC_TCR_CIR(c_interval) | RTC_TCR_TCR(c_value);  

 

  /*Configure the timer seconds and alarm registers*/

  RTC_TSR = 0;

  RTC_TAR = 0xffffffff;

   

  gFlags.rtcAlarmFlag = 0; //сброс флага прерывания

 

  RTC_IER = RTC_IER_TIIE_MASK | RTC_IER_TOIE_MASK | RTC_IER_TAIE_MASK;

 

  /*Enable the counter*/

  RTC_SR |= RTC_SR_TCE_MASK;

 

}

void rtc_set_alarm(unsigned long long int alarm)

{

  unsigned long long int new_alarm = ((unsigned long long int) RTC_TSR) + alarm;

  if(alarm > 0xffffffff) alarm = 0xffffffff;

  RTC_TAR = RTC_TSR + alarm;

 

  gFlags.rtcAlarmFlag = 0;

}


//------------------------------------------

void LLWU_IRQHandler(void)

  if(LLWU_F1 & LLWU_F1_WUF5_MASK)

  {

    gFlags.llwuMSK |= 0x01;

    LLWU_F1 |= LLWU_F1_WUF5_MASK; 

   

    PORTB_PCR0 |= PORT_PCR_ISF_MASK; //clear button interrupt flag

  }

 

  if(LLWU_F3 & LLWU_F3_MWUF0_MASK)

  {

    gFlags.llwuMSK |= 0x02;

    LLWU_F3 |= LLWU_F3_MWUF0_MASK;

   

    LPTMR0_CSR |= LPTMR_CSR_TCF_MASK;  //Clear LPT Compare flag

  }

 

  if(LLWU_F3 & LLWU_F3_MWUF5_MASK)

  {

    gFlags.llwuMSK |= 0x04;

    LLWU_F3 |= LLWU_F3_MWUF5_MASK;

   

    if((RTC_SR & RTC_SR_TIF_MASK)== 0x01)

    {

      RTC_SR &= 0x07;  //clear TCE, or RTC_TSR can  not be written

      RTC_TSR = 0x00000000;  //clear TIF

    }   

    else if((RTC_SR & RTC_SR_TOF_MASK) == 0x02)

    {

      RTC_SR &= 0x07;  //clear TCE, or RTC_TSR can  not be written

      RTC_TSR = 0x00000000;  //clear TOF

    }

    else if((RTC_SR & RTC_SR_TAF_MASK) == 0x04)

    {

      RTC_TAR = 0xffffffff;// Write new alarm value, to generate an alarm every second add 1

      gFlags.rtcAlarmFlag = 1;

    }

  }

  return;

}

//--------------------------------------------------

//--------------------------------------------------

void LLWU_Init(void)

{

  install_irq(LLWU_irq_no, LLWU_prio); //LPTMR_irq_no

 

  /* Enable Port B0 to be a digital pin. */

  SIM_SCGC5 |= SIM_SCGC5_PORTB_MASK;

  PORTB_PCR0 =(PORT_PCR_ISF_MASK | //clear flag if there

  PORT_PCR_MUX(01) | //set pin functionality -GPIO

  PORT_PCR_IRQC(0x0A)); //falling edge interrupt enable*/

              

  /* WUPE0 is used in this case since it is associated with PTE1.

  * This information is in the Chip Configuration chapter of the Reference Manual.

  * 0b10: External input pin enabled with falling edge detection

  */

  LLWU_PE2 |= LLWU_PE2_WUPE5(LLWU_PIN_FALLING); //falling edge detection

 

  //enable LPTR and RTC as wakeup modules

  LLWU_ME |= LLWU_ME_WUME0_MASK | LLWU_ME_WUME5_MASK; //описание внутренних модулей стр. 61 KLQRUG

}

//--------------------------------------------------

Log from device


11:30:42.617> Low Power Modes Test

11:30:42.617>

11:30:42.848> RESET SRC: POR

11:30:42.848> RESET SRC: BROWN OUT

11:30:42.848>

11:30:42.848> SIM_SDID: 0x2515048F

11:30:42.848> SIM_FCFG1: 0x0F000000

11:30:42.848> FAMID: 0010 KL2x Family (USB)

11:30:42.848> SUBFAMID: 0101 KLx5 Subfamily (advanced analog)

11:30:42.848> SERIESID: 0001 KL family

11:30:42.848> SRAMSIZE: 0101 16 KB

11:30:42.848> REVID: 0

11:30:42.848> DIEID: 9

11:30:42.848> PINID: UNDEFINED: 15

11:30:42.848> FLASHSIZE: 1111 128 KB of program flash memory, 4 KB protection region

11:30:42.848> FEI to FEE RES: 23986176

11:30:42.848> MCG MODE: 4

11:30:53.621> SRTC alarm interrupt entered: 11

11:31:04.683> SRTC alarm interrupt entered: 22

11:31:05.997> Press SW to wake up from LLS

11:31:22.309> Exit From Low Power Mode

11:31:22.309> FEE to FBE RES: 32768

11:31:22.309> FBE to FEE RES: 23986176

11:31:22.309> MCG MODE: 4

11:31:22.309> LLWU FLAG: 2

11:31:22.309> LLWU F1: 0

11:31:22.309> LLWU F2: 0

11:31:22.309> LLWU F3: 0

11:31:32.438> SRTC alarm interrupt entered: 34

11:31:43.439> SRTC alarm interrupt entered: 45


First i can see that FAMID KL2x bat i am use KL15

PINID - undefined

I can see that device normally wake up from LLS by button or LPTR? but not by RTC.

Pleas help me - what i do wrong.






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3 Replies

638 Views
willx
Contributor IV

Hi serj none, did you ever solve this ? I'm facing a similar problem and unable to wake up a K64 from any VLLS level using the RTC Alarm.

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638 Views
serjnone
Contributor I

Today i check OSC generation and i can se that after entering to LLS oscillator is stoped. I use OSC32KCLK clock source fo RTC. From documentation OSCERCLK and OSC32KCLK can work in low power modes (25.3 Block Diagram). But it is not sou. I cannot find any settings that disable or enable OSC or OSC32KCLK in low power mode.

After startup i configure MCG fei_fee();

Before entering to LLS

fee_fbe();   

fbe_blpe();

In all cases i can see OSC generation. Only after entering at LLS it lost.

Now i use correct CPU

13:39:20.739> SIM_SDID: 0x15152482

13:39:20.739> SIM_FCFG1: 0x07000000

13:39:20.739> FAMID: 0001 KL1x Family (basic)

13:39:20.739> SUBFAMID: 0101 KLx5 Subfamily (advanced analog)

13:39:20.739> SERIESID: 0001 KL family

13:39:20.739> SRAMSIZE: 0101 16 KB

13:39:20.739> REVID: 2

13:39:20.739> DIEID: 9

13:39:20.739> PINID: 0010 32-pin

13:39:20.739> FLASHSIZE: 0111 128 KB of program flash memory, 4 KB protection region




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637 Views
vicentegomez
NXP TechSupport
NXP TechSupport

Please check the attached file is validation code of the RTC and in different Low power modes.

I hope this will help you.