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Needs help on KL05Z "AdcDemoWithDMA" sample project (bitwise masks, high level questions)

Question asked by codenoob on Mar 8, 2013
Latest reply on Mar 8, 2013 by codenoob

Hi all,

 

I am an absolute newbie to embedded programming world. I downloaded the code sample package and am trying to understand the AdcDemoWithDMA that came with it. I am using Keil.

 

Question 1:  I understood it's demo-ing Analog to Digital conversion, but from what kind of analog input? and output to where?

 

Question 2:  This is a piece of code from "dma0_init". I can barely understand any of them. I am particularly confused by the bit-wise operations and the thousands of "masks" involved. Can anybody pick some examples and explain what those "masks" really do?

 

Question 3: are there more fundamental tutorials? I have read the quick start package, but as you guys have probably realized, I still need more help....

 

Thanks a lot!

 

void Dma0_init(void)
{ 
      SIM_SCGC6 |= SIM_SCGC6_DMAMUX_MASK;
      SIM_SCGC7 |= SIM_SCGC7_DMA_MASK;
      // Config DMA Mux for UART0 operation
      // Disable DMA Mux channel first
      DMAMUX0_CHCFG0 = 0x00;
           
      // Clear pending errors and/or the done bit 
      if (((DMA_DSR_BCR0 & DMA_DSR_BCR_DONE_MASK) == DMA_DSR_BCR_DONE_MASK)
           | ((DMA_DSR_BCR0 & DMA_DSR_BCR_BES_MASK) == DMA_DSR_BCR_BES_MASK)
           | ((DMA_DSR_BCR0 & DMA_DSR_BCR_BED_MASK) == DMA_DSR_BCR_BED_MASK)
           | ((DMA_DSR_BCR0 & DMA_DSR_BCR_CE_MASK) == DMA_DSR_BCR_CE_MASK))
        DMA_DSR_BCR0 |= DMA_DSR_BCR_DONE_MASK;
      
      // Set Source Address (this is the UART0_D register
      DMA_SAR0 = (unsigned int)&ADC0_RA;
      
      // Set BCR to know how many bytes to transfer
      DMA_DSR_BCR0 = DMA_DSR_BCR_BCR(10);
      
      // Clear Source size and Destination size fields.  
      DMA_DCR0 &= ~(DMA_DCR_SSIZE_MASK 
                    | DMA_DCR_DSIZE_MASK
                    );
      
      //     Set DMA as follows:
      //     Source size is byte size
      //     Destination size is byte size
      //     D_REQ cleared automatically by hardware
      //     Destination address will be incremented after each transfer
      //     Cycle Steal mode
      //     External Requests are enabled
      //     Asynchronous DMA requests are enabled.
      DMA_DCR0 |= (DMA_DCR_SSIZE(2)
                   | DMA_DCR_DSIZE(2)
                   | DMA_DCR_DMOD(0)
                   | DMA_DCR_D_REQ_MASK
                   | DMA_DCR_DINC_MASK
                //  | DMA_DCR_SINC_MASK  // no change source address
                   | DMA_DCR_CS_MASK
                   | DMA_DCR_EINT_MASK
                   | DMA_DCR_ERQ_MASK
                   | DMA_DCR_LINKCC(2)
                   | DMA_DCR_LCH1(2)
                //   | DMA_DCR_EADREQ_MASK
                   );
      
      // Set destination address
      DMA_DAR0 = (unsigned int)&m_uiADCResultBuff[0];
      
      // Enables the DMA channel and select the DMA Channel Source  
      DMAMUX0_CHCFG0 = DMA_REQUEST_SOURCE_ADC0; //DMAMUX_CHCFG_ENBL_MASK|DMAMUX_CHCFG_SOURCE(0x31); //0xb1; 
      DMAMUX0_CHCFG0 |= DMAMUX_CHCFG_ENBL_MASK;


      enable_irq(0);
}

 

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