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I.MX6 solo/dual lite register map differs from i.mx6 dual/quad

Question asked by jf simon on Feb 20, 2013
Latest reply on Feb 24, 2013 by Fabio Estevam
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Hi,

 

I was surprised to see that the register map address of I.MX6 solo/dual lite is different from I.MX6 dual/quad.

Maybe I have overlooked something in Freescale documentation, but I didn't see any mentions of that in the docs.

 

For example looking at the IOMUX register map for PAD SD2_DATA1, I see different addresses:

    From i.MX 6Solo/6DualLite Applications Processor Reference Manual, Rev. 0, 11/2012:

        20E_06E8 Pad Control Register          (IOMUXC_SW_PAD_CTL_PAD_SD2_DATA1)

 

 

    From i.MX 6Dual/6Quad Applications Processor Reference Manual, Rev. 0, 11/2012

        20E_0360 Pad Control Register          (IOMUXC_SW_PAD_CTL_PAD_SD2_DATA1)

 

As for u-boot I can see that only the I.MX6 dual/quad is supported. (from arch/arm/include/asm/arch-mx6/mx6x_pins.h)

MX6Q_PAD_SD2_DAT1__USDHC2_DAT1          = IOMUX_PAD(0x0360, 0x004C, 0, 0x0000, 0, 0),

 

Am I confused?

If not, is there somewhere a summary of differences? I am worried having to go through the 5000 or so pages of the manual.

Thx a lot,

-jf simon

 

 

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