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Using two DDR ICs with i.MX53

Question asked by Francois Louw on Feb 11, 2013
Latest reply on Apr 11, 2013 by Francois Louw

Hi,

 

I am trying to do a custom PCB using only two DDR3 ICs, and would appreciate it if somebody can give me a little clarity regarding the following.

 

Using only two chips, it would seem that you would have to use 16-bit access. The chips would probably have to be on opposite sides of the PCB, to assist with D[15:0] routing. This setup would be:

IC 1:

A[13:0], D[15:0], SDBA[2:0], RAS, CAS, SDWE, RESET, SDCS0, SDCKE0, SDCLK_0, SDCLK_0_B, SDODT0, SDQS0, SDQS0_B, SDQS1, SDQS1_B

IC 2:

A[13:0], D[15:0], SDBA[2:0], RAS, CAS, SDWE, RESET, SDCS1, SDCKE1, SDCLK_1, SDCLK_1_B, SDODT1, SDQS0, SDQS0_B, SDQS1, SDQS1_B

 

OR

 

You can use 32 bit access, and keep both chips on the same side of the PCB, but then you would have to route SDCS0, SDCKE0, SDCLK_0, SDCLK_0_B, and SDODT0 to both chips using T-branch topology, which might complicate matters. This setup would be:

 

IC 1:

A[13:0], D[15:0], SDBA[2:0], RAS, CAS, SDWE, RESET, SDCS0, SDCKE0, SDCLK_0, SDCLK_0_B, SDODT0, SDQS0, SDQS0_B, SDQS1, SDQS1_B

IC 2:

A[13:0], D[31:16], SDBA[2:0], RAS, CAS, SDWE, RESET, SDCS0, SDCKE0, SDCLK_0, SDCLK_0_B, SDODT0, SDQS2, SDQS2_B, SDQS3, SDQS3_B

 

 

 

At the moment I am leaning towards the second option, for the sake of being able to do 32-bit access and leaving the bottom side of the PCB free of BGA components. What do you think?

 

Thanks

 

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