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iMX28 I2C slave Rx functionality issue

Question asked by Zeeshan Aslam on Feb 9, 2013
Latest reply on Feb 26, 2013 by PeterChan
Branched to a new discussion


I am having issues in receiving data from Aardvark master with I2C0 configured as slave on iMx28evk.  I go through following configuration sequence:


  1 - Reset APB DMA controller/Reset and initialize I2C controller

  2 - Determine if its master write request from I2C_STAT register on slave_irq interrupt

  3 - Setup DMA descriptor as follows:

       NXTCMDAR =  0x0

       DMACMD  --   cmd = 0x1 (write),  irq = 1, decsema = 1, chain = 0, wait4endcmd = 1, bytes_count = 1, pio_words = 1

       PIOWRD   --   I2C_RUN | I2C_AKCNOWLEDGE | I2C_RETAIN_CLOCK | 1 (xfer_count)

       Other I2C setting:

       CTRL0_MASTER_MODE - 0x0, CTRL1_ACK_MODE = 0x1, Baud_rate = 400KHz, CTRL1_Slave_Address = 0x87, CTRL1_IRQ_EN= 0xFF (all irq enabled)

  4 - Reset the DMA channel # 6 by asserting reset bit 22 and waiting for it to clear in APB_CTRL reg.

  5 - Starting the DMA channel (by writing dma descriptor address to NXTCMDAR register and INCREMENT_SEMA + 1)

  6 - I recieve 0xFF in rx buffer (Whereas my slave address is 0x43 and data starts with 0xAA) and I2C data_completion interrupt and dma_cmd_completion interrupts are generated. Should I receive slave address as a first byte? I am receiving incorrect byte 0xFF?

  7 - After clearing i2c data_cmplt interrupt I check dma_cmd_cmplt irq to setup next dma commad in the same way (steps 3), again reset the dma and then start it as before. But no activity happens on either dma channel or i2c and things remains stalled. I mean successive dma commands must be processed successfully byte after byte but its not the case.  What I2c interrupts I keep enabled?


Kindly help us identify what is wrong/missing in above mentioned receive processing sequence that DMA command is not processed second time I go through the same steps and configuration. (Although sometimes I have observed this issue on first iteration (preparing fr 1st byte receive) as well). Can this problem be caused because of not being able to reset the APB DMA and channels properly?


Thanks & Regards,

Zeeshan Aslam