i.MX 6 DL/S L3.035_3.0.3 patch release

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i.MX 6 DL/S L3.035_3.0.3 patch release

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EnriqueOchoaVaz
Contributor V

Hi All,

The i.MX 6 DL/S L3.035_3.0.3 patch release is now available on the www.freescale.com

·         Files available

     

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Name

Description

1

L3.0.35_3.0.3_LDO_PATCH

This patch release is based on the i.MX 6Solo/6DualLite   Linux L3.0.35_3.0.0 release. The purpose of this patch release is to manage   the LDO and PMIC ramp-up time correctly. This patch also includes the new X   Windows Acceleration chapter for the BSP Reference Manual

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williamtung
Contributor III

diff --git a/arch/arm/mach-mx6/cpu_regulator-mx6.c b/arch/arm/mach-mx6/cpu_regulator-mx6.c

index 8eb976d..30af30a 100644

--- a/arch/arm/mach-mx6/cpu_regulator-mx6.c

+++ b/arch/arm/mach-mx6/cpu_regulator-mx6.c

-    soc_regulator = regulator_get(NULL, soc_reg_id);

-    if (IS_ERR(soc_regulator))

-        printk(KERN_ERR "%s: failed to get soc regulator\n", __func__);

-    pu_regulator = regulator_get(NULL, pu_reg_id);

-    if (IS_ERR(pu_regulator))

-        printk(KERN_ERR "%s: failed to get pu regulator\n", __func__);

-    /*If enable CONFIG_MX6_INTER_LDO_BYPASS and VDDPU_IN is single supplied

-    *by external pmic, it means VDDPU_IN can be turned off if GPU/VPU driver

-    *not running.In this case we should set external_pureg which can be used

-    *in pu_enable/pu_disable of arch/arm/mach-mx6/mx6_anatop_regulator.c to

-    *enable or disable external VDDPU regulator from pmic. But for FSL

-    *reference boards, VDDSOC_IN connect with VDDPU_IN, so we didn't set

-    *pu_reg_id to the external pmic regulator supply name in the board file.

-    *In this case external_pureg should be 0 and can't turn off extern pmic

-    *regulator, but can turn off VDDPU by internal anatop power gate.

-    *

-    *If disable CONFIG_MX6_INTER_LDO_BYPASS, external_pureg will be 0, and

-    *VDDPU can be turned off by internal anatop anatop power gate.

-    *

-    */

-    else if (!IS_ERR(pu_regulator) && strcmp(pu_reg_id, "cpu_vddvpu"))

+    /*

+     * if use ldo bypass and VDDPU_IN is single supplied

+     * by external pmic, it means VDDPU_IN can be turned off

+     * if GPU/VPU driver not running.In this case we should set

+     * external_pureg which can be used in pu_enable/pu_disable of

+     * arch/arm/mach-mx6/mx6_anatop_regulator.c to

+     * enable or disable external VDDPU regulator from pmic. But for FSL

+     * reference boards, VDDSOC_IN connect with VDDPU_IN, so we didn't set

+     * pu_reg_id to the external pmic regulator supply name in the board

+     * file. In this case external_pureg should be 0 and can't turn off

+     * extern pmic regulator, but can turn off VDDPU by internal anatop

+     * power gate.

+     *

+     * if enable internal ldo , external_pureg will be 0, and

+     * VDDPU can be turned off by internal anatop anatop power gate.

+     *

+     */

+    if (!IS_ERR(pu_regulator) && strcmp(pu_reg_id, "cpu_vddvpu"))

         external_pureg = 1;

}


should be this?

+    if (!IS_ERR(pu_regulator) && !strcmp(pu_reg_id, "cpu_vddvpu"))


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