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Kinetis DSPI on PE

Question asked by Jairo Perez on Dec 28, 2012
Latest reply on Nov 3, 2017 by Matheus Kotaki

I am writing to know exactly how the DSPI bean works on the PE for the kinetis family (k53 and K60 to be precise). I have

followed a tutorial from freescale (Freescale Technical Information Center) and got the TX working properly; but I still don't get how TX and RX are set independently if the protocol is achieved by shifting the registers involved in the communication. I did activate the events related to SPI  SM1_ReceiveBlock and SM1_SendBlock, but dont know how to syncronize both if I have to receive data while it's transmiting.

I have also tried this on other code:


#define READ_SPI_FLASH_DATA()                 (unsigned char)SPI2_POPR

#define WAIT_SPI_RECEPTION_END()           while (!(SPI2_SR & SPI_SR_RFDF)) {}

#define CLEAR_RECEPTION_FLAG()              SPI2_SR |= SPI_SR_RFDF

#define WRITE_SPI_CMD0_LAST(byte)           SPI2_PUSHR = (byte | SPI_PUSHR_EOQ  | ulChipSelectLine | SPI_PUSHR_CTAS_CTAR0) // write final byte to output FIFO - this will negate the CS line when complete




WRITE_SPI_CMD0(0xff);                                    // write dummy

while( SPI_SR_EOQF != (SPI2_SR & SPI_SR_EOQF));


SPI2_MCR |= 0xC01; // halt = 1



WAIT_SPI_RECEPTION_END();                                        // wait until at least one byte is in the receive FIFO

(void)READ_SPI_FLASH_DATA();                                     // discard

CLEAR_RECEPTION_FLAG();                                          // clear the receive flag




Please advise me what to do and how to read the RX buffer when transfering data bytes