In my board i m not using CPLD for p1020 POR settings.My SYSCLK is 66.6MHz.
I m facing one issue in Power on Reset for P1020 controller.
When Board Power up P1020 controller dont start executing code unless i give manual Reset using Switch(SW2).
I measured the Rise time/Fall time of HRESET its around 150usec.
Pillup value on HRESET is 10k and Decap of 0.1uF.
On eval board Power on reset goes to CPLD and CPLD generates HRESET of 10nsec Rise time.
Is this condition critical for boot up of P1020?
How can i implement this fast rise time for HRESET without using CPLD?