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Reset vector of 8641

Question asked by Ravindra Kulkarni on Dec 5, 2012
Latest reply on Jan 15, 2013 by Ravindra Kulkarni

The reset vector of 8641 is mentioned as 0xFFFF0100 in the data sheet (section 2.2.6 of MPC8641DRM.pdf)

it says

the e600 cores fetch their reset vectors by performing

a burst read from effective address 0x0_FFF0_0100 and begin executing with the instruction at effective

address 0x0_FFF0_0100.


However the u-boot-2010.09 code assumes the  reset vector at 0xefff0100

See the extract of below.


Please explain this discrepancy in the reset vector.



Note: The HPCN board, uses default boot configuration (does not use i2c boot eeprom).



.text           0xeff00000    0x48e24


.text          0xeff00000     0x2714 arch/powerpc/cpu/mpc86xx/start.o
                0xeff0011c                _start_of_vectors
                0xeff02648                setup_ccsrbar
                 0xeff00004                version_string
                0xeff02408                relocate_code
                0xeff023f8                in32
                0xeff02100                early_bats
                 0xeff023f0                in16r
                0xeff026c0                unlock_ram_in_cache
                0xeff023b8                in8
                0xeff02400                in32r
                0xeff023c8                out16
                 0xeff0262c                enable_ext_addr
                0xeff023e8                in16
                0xeff02208                disable_addr_trans
                0xeff02228                transfer_to_handler
                0xeff00100                _start
                0xeff023a4                dc_read
                0xeff023d8                out32
                0xeff023a8                get_pvr
                 0xeff023d0                out16r
                0xeff020ac                invalidate_bats
                0xeff023c0                out8
                0xeff01fa4                _end_of_vectors
                 0xeff023e0                out32r
                0xeff02578                trap_init
                0xeff00110                _start_warm
                0xeff021e4                clear_tlbs
                0xeff023b0                get_svr