I'm reading a K10 ref manual (Doc #K10P64M72SF1RM, Rev.1) and I wanted to get clarification on the bus clocking. Table 5.1 in section 5.4.1 shows that the MCGOUTCLK can be run up to 72 MHz. It also states that the bus clock can run up to a max of 50MHz (based on OUTDIV2 per the previous section). In order to do this however, it looks like you'd have to run the MCGOUTCLK at 50MHz and let OUTDIV2 correspond to a divider of 1. Am I understanding this correctly? So... can't clock the core at 72MHz and the bus at 50MHz in the same application, correct? What happens when I have OUTDIV1 set such that the core is running at 72MHz, and I let OUTDIV2 = 0x0 (divider of 1) for the bus clock?