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Using the cache line locking instructions

Question asked by moncef_mechri on Nov 28, 2012

Hi everybody,


I'm trying to use the cache line locking instructions (like dcbtls) on a p4080 system running Linux but it doesn't seem to be working.


The code compiles just fine but I get an Illegal Instruction error at runtime.


I tried to imitate the way the linux kernel uses the dcbt instruction (see - linux/kernel/git/torvalds/linux.git/blob - arch/powerpc/include/asm/processor.h ).


My only wild guess is that I do not have the right to execute this instruction since the doc says that MSR[UCLE] must be set for this instruction to be available to users. But I do not know how to check that.


Any idea?



Original Attachment has been moved to: lock_lines-(1)