CW and Cortex-M4 command SMLALD

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CW and Cortex-M4 command SMLALD

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MarkP_
Contributor V

Hi,

The CW doen't handle correctly inline asm command SMLALD.

CW version is 10.2 Special Edition. CPU is Kinetis K10, CPU-selection in compiler settings is cortex-m4.

CW doesn't recognize that arguments RdLo and RdHi are input/output parameters.

It handles those "output only" and uses CPU registers wrongly. "+r" doesn't help.

Operation can be corrected by adding dummy-command SMUAD, which uses RE_LO and RE_HI

and prevents optimization to rearrange CPU registers.

But those extra commands waste time in our time critical loop.

Can this bug corrected by patching some compiler file(s)?

Is this corrected in CW version 10.3?

~Mark

 

In header file:

#define ASM_SMUAD(Rd, Rn, Rm) \
  ({ asm volatile { smuad Rd, Rn, Rm } })

#define ASM_SMLALD(RdLo, RdHi, Rn, Rm) \
  ({ asm volatile ( "smlald %0, %1, %2, %3" :  "+r" (RdLo), "+r" (RdHi) : "r" (Rn), "r" (Rm) ); })

 

In application SW:

in for-loop:

  uint32_t dummy;
  ASM_SMUAD( dummy, RE_LO, RE_HI ); // Dummy instruction to correct SMLALD by using RE_LO, RE_HI
  ASM_SMLALD( RE_LO, RE_HI, X_VAL, COS_VAL );

  ASM_SMUAD( dummy, IM_LO, IM_HI ); // Dummy instruction to correct SMLALD by using IM_LO, IM_HI
  ASM_SMLALD( IM_LO, IM_HI, X_VAL, SIN_VAL );

 

 

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Rick_Li
NXP Employee
NXP Employee

Regarding to your issue:
There is a header file with name "cw_cortex_M4_dsp.h" which located in {CW 10.x}MCU\ARM_EABI_Support\ewl\EWL_Runtime\Runtime_ARM\Common_Includes.
This file defined these instructions like SMLALD.

Please just include this header into your application and then you can call __SMLALD directly.

if you are using a CW 10.3, then, GCC compiler is also supported in this version of CW.

you can select GCC as the compiler tool chain when creating a new project.

for GCC compiler, you can use SMLALD as you did.


Hope it helps!

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