AnsweredAssumed Answered

IO Port speed does not match BUSCLK frequency

Question asked by Rastislav Matula on Oct 31, 2012
Latest reply on Nov 1, 2012 by Rastislav Matula

Hi All,


Just a quick question, maybe this is another basic thing, but it seems I missing something. I am trying to drive IO pin (among other things ) and is vital for the project to drive it as fast as possible. I am using S08JM60 mcu, CW 10.1 with PE (-Ot), 2MHz external crystal (set so the "Internal Bus Clock" = 24MHz, "PLL output cock freq." = 48MHz ). Looking in the assembly code i could see:




1bda:   1E06 BSET 7,0x06



1bdc:   1F06 BCLR 7,0x06


I am assuming that each of this instructions should take only one clock cycle (BUSCLK=24MHz), so the pulse length   __|'''''''''|__  should be ~41,6ns. But obviously I can see something different on oscilloscope, where the pulse length is ~208ns (4.8MHz). It seems, that everything is running slower than I think the real possibilities are. Could somebody enlighten me into this?  What about core frequency, shouldn't be execution of instruction even faster (48MHz) if i am not trying to access GPIO? Is it possible to twiddle with IO faster than 200ns?


Thanks for your time,