can anybody know, what kind of input is SPDIF_Rx pin? Do i need to transform tipical SPDIF signal to TLL logic [3.3V] or is it this transformation done in processor?
The (input) signals should be transformed to voltage level NVCC_GPIO. There are three working points for NVCC_GPIO : 1.8V ; 2.775V ; 3.3V.
High-Level DC input voltage,VIH should be in range 0.7V x NVCC_GPIO - NVCC_GPIO.
Low-Level DC input voltage, VIL should be in range 0V - 0.3 x NVCC_GPIO.
Hi Andrej and Yuri,
One thing to be care ful of. SPDIF or IEC60958 signal is 0.5 to 0.6V Pk-pk. So, yes you have to convert the signal level of your choice to match what Yuri mentioned. One other thing to be really careful is to make sure that the edge rate and propagation delay for rise/fall time must be kept or you will end up with severe jitter degrading the signal quality. So, make sure to use high speed level shifter with close rise/fall time spec.
Also, depending on whether Coax (75ohm) or Optical connection could change the signal level, too. So you may have to factor that in.
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