AnsweredAssumed Answered

i.MX53 boot on SD Card

Question asked by nicolask on Sep 25, 2012
Latest reply on Sep 25, 2012 by nicolask



I have developped an i.MX53 board with an SD Card interface.

U-boot runs fine at startup. I can load Linux kernel in RAM and start the kernel.


The problem is when the kernel trys to mount the rootfs, the SD Card was not detected.


I try to boot the QSB board with my SD Card  and it's run fine. (u-boot ok, kernel and rootfs ok, Loging ok )


I don't know where to search. My board uses the same hardware for th SD Card interface, same OSC (24MHz), 1GB of RAM (actually 512MB detected but it's normal)


The only thing is the SD Card doesn't reply to any command. (CMD0 and others )


Can someone please help me ?


Kernel start log :


Uncompressing Linux... done, booting the kernel.

Booting Linux on physical CPU 0

Linux version 3.3.2-ideb0 (nicolas@gits) (gcc version 4.7.1 20120531 (prerelease) (crosstool-NG linaro-1.13.1-2012.06-20120625 - Linaro GCC 2012.06) ) #63 Tue Sep 25 15:29:41 CEST 2012

CPU: ARMv7 Processor [412fc085] revision 5 (ARMv7), cr=10c53c7d

CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache

Machine: AIM MX53 iDEB0 Board

Ignoring RAM at b0000000-cfffffff (vmalloc region overlap).

Memory policy: ECC disabled, Data cache writeback

On node 0 totalpages: 131072

free_area_init_node: node 0, pgdat c02e5708, node_mem_map c0301000

  Normal zone: 1024 pages used for memmap

  Normal zone: 0 pages reserved

  Normal zone: 130048 pages, LIFO batch:31

pcpu-alloc: s0 r0 d32768 u32768 alloc=1*32768

pcpu-alloc: [0] 0

Built 1 zonelists in Zone order, mobility grouping on.  Total pages: 130048

Kernel command line: noinitrd console=ttymxc0,115200 debug ip=dhcp root=/dev/mmcblk0p1 rw rootwait init=/sbin/init

PID hash table entries: 2048 (order: 1, 8192 bytes)

Dentry cache hash table entries: 65536 (order: 6, 262144 bytes)

Inode-cache hash table entries: 32768 (order: 5, 131072 bytes)

Memory: 512MB = 512MB total

Memory: 516672k/516672k available, 7616k reserved, 0K highmem

Virtual kernel memory layout:

    vector  : 0xffff0000 - 0xffff1000   (   4 kB)

    fixmap  : 0xfff00000 - 0xfffe0000   ( 896 kB)

    vmalloc : 0xe0800000 - 0xff000000   ( 488 MB)

    lowmem  : 0xc0000000 - 0xe0000000   ( 512 MB)

    modules : 0xbf000000 - 0xc0000000   (  16 MB)

      .text : 0xc0008000 - 0xc02b9000   (2756 kB)

      .init : 0xc02b9000 - 0xc02d1000   (  96 kB)

      .data : 0xc02d2000 - 0xc02e5d20   (  80 kB)

       .bss : 0xc02e5d44 - 0xc03002ac   ( 106 kB)

SLUB: Genslabs=11, HWalign=64, Order=0-3, MinObjects=0, CPUs=1, Nodes=1

NR_IRQS:400 nr_irqs:400 400

TrustZone Interrupt Controller (TZIC) initialized

CPU identified as i.MX53, silicon rev 2.1

sched_clock: 32 bits at 66MHz, resolution 15ns, wraps every 64424ms

Console: colour dummy device 80x30

Calibrating delay loop... 795.44 BogoMIPS (lpj=3977216)

pid_max: default: 32768 minimum: 301

Mount-cache hash table entries: 512

CPU: Testing write buffer coherency: ok

hw perfevents: enabled with ARMv7 Cortex-A8 PMU driver, 5 counters available

Setting up static identity map for 0x7020a7b0 - 0x7020a808

gpiochip_add: registered GPIOs 0 to 31 on device: imx31-gpio.0

gpiochip_add: registered GPIOs 32 to 63 on device: imx31-gpio.1

gpiochip_add: registered GPIOs 64 to 95 on device: imx31-gpio.2

gpiochip_add: registered GPIOs 96 to 127 on device: imx31-gpio.3

gpiochip_add: registered GPIOs 128 to 159 on device: imx31-gpio.4

gpiochip_add: registered GPIOs 160 to 191 on device: imx31-gpio.5

gpiochip_add: registered GPIOs 192 to 223 on device: imx31-gpio.6

hw-breakpoint: debug architecture 0x4 unsupported.

bio: create slab <bio-0> at 0

SCSI subsystem initialized

Switching to clocksource mxc_timer1

i.MXC CPU frequency driver

msgmni has been set to 1009

Block layer SCSI generic (bsg) driver version 0.4 loaded (major 254)

io scheduler noop registered

io scheduler deadline registered

io scheduler cfq registered (default)

Serial: IMX driver

imx21-uart.0: ttymxc0 at MMIO 0x53fbc000 (irq = 31) is a IMX

console [ttymxc0] enabled

imx21-uart.1: ttymxc1 at MMIO 0x53fc0000 (irq = 32) is a IMX

imx21-uart.3: ttymxc3 at MMIO 0x53ff0000 (irq = 13) is a IMX

imx21-uart.4: ttymxc4 at MMIO 0x63f90000 (irq = 86) is a IMX

loop: module loaded

i2c /dev entries driver

sdhci: Secure Digital Host Controller Interface driver

sdhci: Copyright(c) Pierre Ossman

sdhci-pltfm: SDHCI platform and OF driver helper

mmc0: SDHCI controller on sdhci-esdhc-imx53.0 [sdhci-esdhc-imx53.0] using DMA

VFP support v0.3: implementor 41 architecture 3 part 30 variant c rev 2

Waiting for root device /dev/mmcblk0p1...



Nicolas K