I am trying to get multi-channel audio working on the i.MX28. We have 6 channels linked between another processor and the i.MX. I am trying to figure out how to determine what channel I am on, I can't seem to figure out a way to do it.
Since there is only one data register, when I start up I can't tell if I am reading channel 1-6, there is nothing in the status registers that indicates the status of the LR clock or what FIFO the data register is currently accessing. In the manual it states that when a FIFO condition occurs (overrun/underrun) I should shut down the SAIF, clear the FIFOs and restart, that way I will not loose LR sync. Well how do I do that, do I just read the FIFO 4 times, that doesn't seem to clear the service bit, but it does clear the overflow bit.
Basically, I need to know when the driver starts reading data that it is ready from channel 1 first. Any help would be appreciated.