HC(S)08: Write sequence for STHX instruction

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HC(S)08: Write sequence for STHX instruction

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bigmac
Specialist III
Hello all,
 
When writing values to some of the peripheral word registers, particularly for the HC908 devices, it is necessary to write the low byte last, after writing the high byte.  Similar issues can also apply when reading the word registers.  For the HCS08 devices, the write sequence does not appear to be as critical.
 
For unambiguous sequencing, of course each byte of the word can be individually written or read.  However, it would seem more efficient if both bytes can be written using the STHX instruction.  This raises the issue of the detailed operation of the instruction - is the write sequence of the individual bytes compatible with the write requirements of the peripheral registers?
 
For some registers the use of STHX does appear to be OK.  I have successfully written to the timer modulo register (before I realised it had the write sequencing constraint).  To verify this the question remains, where can I find this detailed information about the sequence of operations within each instruction?
 
Incidently, in response to the statement -
TMOD = 0x7FFF;
the CW compiler appears to generate the following instructions -
LDHX  #$7FFF
STHX  TMOD
 
Thank you for any help in clarifying this issue.
 
Regards,
Mac
 
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tonyp
Senior Contributor II
Check HCS08RMV1 or CPU08RM documents.

For each instruction there is a detailed description of the actions taken.  For example, for STHX it says:

Stores the contents of H in memory location M and then the contents of X into the next memory
location (M + $0001). The N condition code bit is set if the most significant bit of H was set, the Z bit
is set if the value of H:X was $0000, and V is cleared. This allows conditional branching after the store
without having to do a separate test or compare.

So, H is saved first, then X.

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bigmac
Specialist III
Hello,
 
Thank you for your answer.  So the STHX sequence for the write operation is clear, but the the sequence for the read process (LDHX) remains ambiguous - I am not sure I can assume it will be the same sequence as the write process.
 
I seem to recall having once seen a document that described what occurred for each cycle of each instruction, but I have not been able to find that document - it may have actually been for the HC05 device.  Can anyone point me to a similar document for the HC908 and HCS08 device.
 
Regards,
Mac
 
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Alban
Senior Contributor II
Hello Mac,

HCS08 Family - Reference Manual - HCS08RMV1.pdf
gave me a page for each instruction and access details:

Instruction           Add Mode     Opcode   Cycle      Access Detail
STHX opr8a           DIR             35 dd         4           wwpp
STHX opr16a         EXT            96 hh ll      5           pwwpp
STHX oprx8,SP     SP1            9E FF ff     5           pwwpp

Cheers,
Alban.
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bigmac
Specialist III
Hello Alban,
 
The instructions of specific interest areLDHX opr8a andSTHX opr8a since my query pertains to I/O registers.
 
The reference manual tells me that the LDHX instruction uses two read cycles, and the STHX instruction uses two write cycles.  However, the manual does not indicate (except for the STHX case, as previously covered) which read/write cycle is for H, and which cycle is for X.  Additionally, the manual is for the HCS08 - I am not sure I can assume the HC908 would be the same since there are differences in many instruction cycles.
 
For the HC908 devices, whether or not these instructions can be utilised for the reading or writing of certain word registers requires that the high byte (H) be read or written first, followed by the low byte (X).  So the byte sequence is very important for these cases.  The word registers that have these requirements are -
 
ADC10 module:
ADR requires sequenced reading of 10-bit value.
 
TIM module:
TMOD requires sequenced write.
TCNT requires sequenced read.
TCHx register for each channel requires sequenced read for IC mode, and sequenced write for OC and PWM modes.
 
It has been established that the write sequence for STHX is correct, but the read sequence for LDHX still remains uncertain.
 
Regards,
Mac
 
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bigmac
Specialist III
Hello,
 
I have now found an answer to this issue, at least for the TIM registers.  The document TIM08RM (TIM Reference Manual) does explicitly state that the instructions STHX and LDHX may be used to write and read the various word registers associated with the TIM.
 
Regards,
Mac
 
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