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FEC_MIIGSK_CFGR and FEC_MIIGSK_ENR registers not documented in RM or datasheet

Question asked by Ned Konz on Jul 12, 2012
Latest reply on Oct 19, 2016 by Yuri Muhin

In the i.mx53RM and i.mx53IEC manuals, I can't find any documentation of the bits within the FEC_MIIGSK_CFGR and FEC_MIIGSK_ENR registers.

The following bits are referred to in the manual but not documented. I have added what I think from reading the Linux sources is the correct positions, but am not sure.

FEC_MIIGSK_CFGR (0x63FE_C300):

  • I/F_MODE bit[1:0], 01=RMII, 00=MII
  • FRCONT  bit6, 1=force 10Mbps
  • LBMODE

FEC_MIIGSK_ENR (0x63FE_C308)

  • EN bit1
  • READY  bit2, r/o

 

What is the correct definition of these registers?

 

Also, can someone make a note to fix the manuals?

 

Thanks...

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