Leon Woestenberg

Image sensor almost working on i.MX53 CSI, but getting every even byte twice?

Discussion created by Leon Woestenberg on Apr 26, 2012
Latest reply on May 14, 2012 by Leon Woestenberg

Hello,

 

we attached a FPGA to the 8-bit CSI bus on the IMX53QSB. It generates proper v/hsync/pixclk for the "gated mode".

 

The FPGA sends incremental byte values on the bus, 1920 x 3 (RGB) x 1080 bytes per frame.

 

Using the unit test "v4l2_mxc_capture.out" we capture the data in BGR24 mode using the CSI->MEM mode (-i 1).

 

In the capture output, we expect

00 01 02 03 04 05 06 07 08 09 etc.

but see:

00 00 02 02 04 04 06 06 08 08 etc.

 

Would be great if someone can provide insight on what could be causing this.

 

Regards, Leon.

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