Recently some customers reported they find the audio Left and right channel swap issue of i.MX53 SSI module. The root cause is when CPU loading increase it don’t feed PCM date into SSI TX FIFO in time and result in SSI TX FIFO underrun, SSI transmits previous data in FIFO repeatedly and Left and right channel swap. But if SSI dual FIFO feature is enabled, both left / right channel own independent FIFO, which result that FIFO0 only sends left channel data and FIFO1 sends right channel data.
DUAL_FIFO was documented into BSP RM.CONFIG_MXC_SSI_DUAL_FIFO: This config is used to enable 2 SSI FIFO for audio transfer.In menuconfig, this option is available under
Device drivers > Sound card support > Advanced Linux Sound Architecture > ALSA for SoC
audio support > MXC SSI enable dual fifo.