Qiang Li - Mpu Se

MDDR initialization code for IMX28 -blog archive

Discussion created by Qiang Li - Mpu Se Employee on Feb 29, 2012

The freescale default BSP shows the DDR2 initialization code, the followed is the MDDR case:

 

void MDDREmiController_166MHz(void)
{
 volatile UINT32* DRAM_REG = (volatile UINT32*) HW_DRAM_CTL00_ADDR;

 DRAM_REG[0]  = 0x00000000;
 DRAM_REG[16] = 0x00000000;
 DRAM_REG[21] = 0x00000000;
 DRAM_REG[22] = 0x00000000;
 DRAM_REG[23] = 0x00000000;
 DRAM_REG[24] = 0x00000000;
 DRAM_REG[25] = 0x00000000;
 DRAM_REG[26] = 0x00010101;
 DRAM_REG[27] = 0x01010101;
 DRAM_REG[28] = 0x000f0f01;
 DRAM_REG[29] = 0x0f02020a;
 DRAM_REG[31] = 0x00000101;
 DRAM_REG[32] = 0x00000100;
 DRAM_REG[33] = 0x00000100;
 DRAM_REG[34] = 0x01000000;
 DRAM_REG[35] = 0x00000002;
 DRAM_REG[36] = 0x01010000;
 DRAM_REG[37] = 0x08060301;
 DRAM_REG[38] = 0x06000001;
 DRAM_REG[39] = 0x0a000000;
 DRAM_REG[40] = 0x02009c40;
 DRAM_REG[41] = 0x0002030b;
 DRAM_REG[42] = 0x0036a608;
 DRAM_REG[43] = 0x03160305;
 DRAM_REG[44] = 0x03030002;
 DRAM_REG[45] = 0x001f001c;
 DRAM_REG[48] = 0x00012100;
 DRAM_REG[49] = 0xffff0303;
 DRAM_REG[50] = 0x00012100;
 DRAM_REG[51] = 0xffff0303;
 DRAM_REG[52] = 0x00012100;
 DRAM_REG[53] = 0xffff0303;
 DRAM_REG[54] = 0x00012100;
 DRAM_REG[55] = 0xffff0303;
 DRAM_REG[56] = 0x00000003;
 DRAM_REG[58] = 0x00000000;
 DRAM_REG[66] = 0x00000305;
 DRAM_REG[67] = 0x01000f02;
 DRAM_REG[69] = 0x00000200;
 DRAM_REG[70] = 0x00020007;
 DRAM_REG[71] = 0xf3004a27;
 DRAM_REG[72] = 0xf3004a27;
 DRAM_REG[75] = 0x07000310;
 DRAM_REG[76] = 0x07000310;
 DRAM_REG[79] = 0x00800004;
 DRAM_REG[80] = 0x00000000;
 DRAM_REG[81] = 0x00000000;
 DRAM_REG[82] = 0x01000000;
 DRAM_REG[83] = 0x01020408;
 DRAM_REG[84] = 0x08040201;
 DRAM_REG[85] = 0x000f1133;
 DRAM_REG[87] = 0x00001f08;
 DRAM_REG[88] = 0x00001f08;
 DRAM_REG[91] = 0x00001f01;
 DRAM_REG[92] = 0x00001f01;
 DRAM_REG[162] = 0x00000000;
 DRAM_REG[163] = 0x00010301;
 DRAM_REG[164] = 0x00000002;
 DRAM_REG[171] = 0x01010000;
 DRAM_REG[172] = 0x01000100;
 DRAM_REG[173] = 0x03030000;
 DRAM_REG[174] = 0x00020303;
 DRAM_REG[175] = 0x01010202;
 DRAM_REG[176] = 0x00000000;
 DRAM_REG[177] = 0x01030101;
 DRAM_REG[178] = 0x21002101;
 DRAM_REG[179] = 0x00030500;
 DRAM_REG[180] = 0x03050305;
 DRAM_REG[181] = 0x00320032;
 DRAM_REG[182] = 0x00320032;
 DRAM_REG[183] = 0x00000000;
 DRAM_REG[184] = 0x00000000;
 DRAM_REG[185] = 0x00000000;
 DRAM_REG[186] = 0x00000000;
 DRAM_REG[187] = 0x00000000;
 DRAM_REG[188] = 0x00000000;
 DRAM_REG[189] = 0xffffffff;
}

Outcomes