Raman Jamloki

i.mx28 default Exception addresses

Discussion created by Raman Jamloki on Feb 15, 2012
Latest reply on Feb 16, 2012 by Yuri Muhin

Hi All, I am looking for the default exception addresses for i.mx28 processor. I beleive they must be in somewhere in OCRAM or OCROM. The only thing I found in i.mx28 manual is below


The following exceptions are recognized by the core:
• SWI—Software interrupt
• UNDEF—Undefined instruction
• PABT—Instruction prefetch abort
• FIQ—Fast peripheral interrupt
• IRQ—Normal peripheral interrupt
• DABT—Data abort
• RESET—Reset
• BKPT—Breakpoint
The vector table pointing to these interrupts can be located at physical address 0x00000000
or 0xFFFF0000. The i.MX28 maps its 64-Kbyte on-chip ROM to the address 0xFFFF0000
to 0xFFFFFFFF. The core is hardwired to use the high address vector table at hard reset
(core port VINITHI =1).


In the memory map chapter the on chip ROM address starts form C0000000 and the size is 128K. Thatis confusing.

I want to give pointer of own exception handlers at the default exception addresses. Any information on this regard would be of great help.