Mark Roy

NAND Flash and GPIO Boot Overides

Discussion created by Mark Roy on Feb 14, 2012

Hey Folks,

I'm designing a new board based off the QSB.  I am adding two NAND flash chips and connecting them to the EIM_DA[7..0] pins.    These are the same pins used for some of the GPIO boot overides which are sampled at boot when using boot mode 0x00.   If I use 10k pull-ups/downs on these pins to select my desired boot config, will it interfere with normal NAND operation?   Should I instead configure my NAND to use the PATA lines?  Or should I just not use internal boot and boot from fuses instead? 


Suggestions appreciated.



Mark Roy