9S08QG8 STOP1 issues

[Dougq5x]

Hi
I am trying to power up and power down my project with the PTA5/IRQ/RESET pin only.
In the main program I configure the pin as IRQ. 

Inside an interrupt service routine I am executing a STOP command (processor is configured for STOP1 mode).  The literature says  "upon wakeup from STOP1 mode the MCU will start up as from a power on reset(POR). The CPU will take the reset vector." (Page 38 of data sheet)  What I am finding when using the debugger (WinIDE with DEMO9S08QG8), is that waking up from STOP1 the CPU carries on to the next instruction in the ISR.  Is the debugger not capable of simulating the STOP1 mode, or is there another reason not to STOP in an ISR? 

Thanks

[stevo10]

When using interrupts the CPU will finish it current instruction (with this info placed on the stack) and will then begin to execute the ISR. It will only exit the ISR when it has been fully executed. (and the CPU will regain the address info from the stack and contiune to execute from where it was interrupted). You are still finding yourself in the ISR because the interrupt has not been fully serviced yet.

[Dougq5x]

Hi Stevo10 and thanks for your reply.
In Stop1mode according to the data sheet "all module control and status registers are reset" and "the processor wakes up as from a power on reset and takes the reset vector"
It is clear that what you are saying happens, does actually happen; but I would have thought the stack pointer would have been lost as well as the stacked register data.  Also if the reset vector is taken, shouldn't program execution continue from the address stored in the reset vector which is outside the interrupt service routine? 
I have resolved the issue by setting a "ready to stop flag" inside the ISR and executing the STOP instruction outside the ISR, but I still don't understand the original problem.
Doug

[bigmac]

Hello Doug,

It would seem unusual to have a STOP instruction within ISR code.  Conventionally, I would assume that all pending tasks, as a result of hardware interrupts, would usually need to be completed before entering one of the STOP modes.  However, I can't see a reason why the instruction should not work within the ISR, particularly for STOP1.

It is not clear to me whether you are using full chip simulation, or are debugging the actual device using BDM.  If using simulation, it would not surprise me if there were problems in simulating stop mode.

However, for debug using BDM, I wonder if STOP1 is actually entered whilst BDM is enabled.  Does the problem persist with BDM cable disconnected?

Regards,

Mac