In my application I have to connect an i.MX253 and an FPGA, to transfer data in both directions,
allowing around 2MB/s per channel. The idea is to share the address/data bus the FPGA, and use the WEIM to map on the i.MX some memory that's inside the FPGA.
On the FPGA->i.MX direction, the i.MX should read the data as far as possible when the FPGA tells that data are ready. I suppose to use a DMA process to do the transfer FPGA->RAM, but the trigger could be hardware to minimize intervention times. At the end of the DMA transfer, the OS (linux) will be triggered by interrupt. I think it should be correct to use the EXT_EVENT inputs for this purpose. At the end of each transfer the FPGA needs to be notified that the data has been all read, so it can flush the memory and reuse for next data burst. Also this procedure should be done in less time as possible... It could be another signal coming from i.MX to FPGA. Could it be done directly by DMA hardware?
What could be the better way to implement this?
On the software side, we are working with linux both for development machines and product.
I know that we would need to develop a SDMA script for this purpose, but I'm unsure about the tools that are available to do it. Where could I find some more information about it, possibly with examples?