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MPC8540 Local bus timing

Question asked by Derek Cameron on Apr 10, 2007
Latest reply on Sep 21, 2012 by joeychan

We are using the Local Bus Controller on the MPC8540 in GPCM mode. The Local Bus clock (LCLK) is set to be either 25MHz or 33MHz depending on which PCI clock frequency is used. As there is an errata (LBC11) that states that the LCLK DLL can lose lock we were recommended to select DLL bypass when LCLK is less than 66MHz. With the LCLK DLL enabled the timing of the Local Bus clock is per Figure 13.22 (Basic LBC Bus Cycle) in the Reference Manual. When the LCLK DLL is bypassed the LCLK is 180 degrees different from Figure 13.22. This leads me to ask the following questions:

1/

Is the LCLK behaviour that we observe what you would expect?

2/

Are we correct to bypass the LCLK DLL?

3/

If we bypass the LCLK DLL will that always give LCLK with exactly a 180 degree phase shift relative to Figure 13.22?

4/

If we change processor to the MPC8548E and bypass the LCLK DLL, will the MPC8548E LCLK behave exactly the same as the MPC8540?

 

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