Andrew Sapuntzakis

563xx: reading state of ESSI-controlled pin

Discussion created by Andrew Sapuntzakis on Mar 26, 2007
Latest reply on Mar 27, 2007 by Andrew Sapuntzakis
If PC2 is assigned to the ESSI0 peripheral (frame sync/SC2), can its state be read by the DSP core? As part of init, I need to change the the state of SCK and STD on (near) the rising edge of the frame sync, and my attempts to poll PC2 don't seem to work. A 'scope shows the correct signal being produced by the pin.
 

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