In looking at the RS08 configuration registers, you can't help but notice that they _could_ have been much more tightly packed. For example: the ICSC1 and ICSC2 registers occupy 16 bits of RAM address space at $0014 and $0015 -- but only 5 of these sixteen bits are actually used. Similarly, locations $0017 and $0018 could clearly be combined into a single byte -- with two bits to spare.
Does anyone know why Freescale chose to abandon so many bit addresses in low RAM, rather than implementing them and allowing their use as flags? I would think that the real estate savings from not doing this would be marginal.
Curt wrote:Can't help but wonder what the Freescale designers would bring to market if they completely abandoned family compatibility though, and shot for the "Ultimate 8-pin MCU" instead.
Hmmm... I don't know billw...
Elegance and low cost need not be mutually exclusive -- especially if one considers life cycle cost. And sIlicon is alarmingly cheap if you don't insist on sub-micron, triple-level metal processes and a 600 pin BGA package (The later is, of course, not particularly good news to a Freescale...).
I think the 6800 was something of an effort to achieve a PDP8 in a single chip wasn't it? So the siren song of family compatibility has a very long history at Mot/Freescale!
One thing for sure though. If you'd have told an engineer with a PDP8 that he was going to need 10,000 files to make his minicomputer work, he/she would have a) been gob-smacked for a minute or two and then b) laughed in your face Then gone back to poking holes in his paper tape!
Curt wrote:Ah -- interesting. I've not used the HC08 or HCS08, so wasn't aware of the effort toachieve family compatibility.Can't help but wonder what the Freescale designers would bring to market if they completely abandoned family compatibility though, and shot for the "Ultimate 8-pin MCU" instead.Maybe that would be a fun FPGA project
Message Edited by Curt on 2007-03-2701:37 PM