- What will the MCU frequency be if external crystal fails when the MCU is running?
If the ICG is in FEE, a loss of reference clock causes the ICG to enter SCM, and a loss of DCO clock causes the ICG to enter FBE mode.
When entering to SCM out of reset the frequency will be 8MHz, however using the filter register this frequency can be varied up to 40MHz.
When clock fails in FEE mode and SCM is entered, the SCM will have the same configuration than it had before entering FEE (this will help us with following questions).
- What happens if external crystal fails in stop3 mode? I'm using external crystal in stop3 mode to wake up every second with RTI. Does it automatically wake up at such as failures? What will the MCU frequency be after waking up?
Loss of clock does not generate an interrupt that can wake up the MCU. So external crystal failure when in stop mode will cause the MCU to stop.
- Can I keep the bus frequency approximately constant when external xtal fails? Because my application needs clock based communications such as I2C(100kHz), SPI(400-500kHz) and SCI(9600baud).
In order to do this I advice you to configure the SCM with a target frequency similar to the one that you will be using with the FEE mode. It is important to remember that clock mode changes require some clock cycles to work. So there might be some transition states where the frequency won't allow the MCU to communicate through this ports.
- In some extreme cases such as temperature and humidity, the external low power crystals may stop. And reworks in normal conditions. Can clock monitor automatically switch to external xtal if it works?
This must be performed by software. There is no automatical way to switch, however you may check the status bits for the ICG to check the actual mode and you can attempt to change it. If changing mode is not possible (because the extreme cases are still present) then you may try to switch again later.
You may also use the ICG interrupt features to detect clock failure and to set a flag. When this flag is set you may try to switch back to the prefferred state until you accomplish it.
Any clock changes can be issued anytime, however it is important to look at the Table 10-9 "ICG State Table" for information on what conditions should be met for any desired mode change.
- Why doesn't current consumption of the MCU reduce about 9uA indicated in the datasheet when I disabled the clock monitor (LOCD = 1). Disabling or enabling the clock monitor don't change the current at all. May it be not enough that asserting LOCD bit to disable clock monitor?
LOCD bit should be enough to enable/disable the loss of clock detection circuit. If you would like some tests done on this topic please allow me a couple of days to get this working and give some feedback on the subject.
This may take longer than expected so, please be patient.
- Does freescale has an application note about clock monitor?
There aren't any app. notes about the clock monitor right now. Although I'll flag this as a followup for this Service Request.
