chunhua xie

Who can do me a favour about MC68332!!please!!!!

Discussion created by chunhua xie on Jan 31, 2007
Latest reply on Jan 31, 2007 by chunhua xie
When I read the system integration module reference manual and one sentence I can't understand. It is "The state of the clock mode (MODCLK) pin during reset determines which clock
source the MCU uses. When MODCLK is held high during reset, the clock signal is
generated from a reference frequency. When MODCLK is held low during reset, the
clock synthesizer is disabled, and an external system clock signal must be applied."
So my question is how do I make MODCLK high or low during reset, is that connect a resistor between VDD and MODCLK pin?