Peter Richter

SWI interrupt and stack frame

Discussion created by Peter Richter on Jan 11, 2007
Latest reply on Jan 11, 2007 by Steve Mcaslan
Hi, may be somebody can give me an advise in flw. cases.
I've to convert assembler code written for HC11 to support now a 9S12XA512 controller.
Inside the code are a lot of SWI interrupts. Now I recognize flw. during debugging.
If there is an SWI interrupt, the stack is filled with nine bytes as I assumed (all registers plus CCR), but after the CCR (9'th byte)is stored on the stack, the IPL is also stored onto the stack (10'th byte). Unfortunately I can't find any advise in the CPU12RM or MC912XDP512 documentation about this behaviour. Further this is not compatible with the HC11 SWI instruction.
I'm confused about that, but may be I'm doing something wrong.

P.S. I'm using CW 4.5 build 6037 with newest update.