As per the Freescale iMX257 reference PDK design, I am looking at re-using the MC34704A power management chip. However, it appears that it was not really designed for the iMX257, and I am requiring adidtional LDO's externally to compensate for some of the sequencing. Has anyone used this chip successfully on an iMX257, and know of any issues, pitfalls, easier methods of squencing some of the other rails.
I have discovered from Freescale that the NVCC_CRM (3.3V) input actually needs to be sequenced up first before the Core_QVDD (1.45V), so that the NVCC_DRYICE power switch for the RTC does not corrupt the RTC time. (See Errata). The new die V1.2 of the iMX257 fixes part of the problem, but requires this special sequencing. Does anyone else know about this ?