Can you let us know what toolchain you are using?
In principle sharing variables between the cores is no different to sharing variables between two different C files on the same CPU.
You declare a variable in one file (say main.c)
unsigned int LastIntTime;
Then access it in the other (say xgate.cxgate) with
extern unsigned int LastIntTime;
Now both cores can read and write the variable (but be careful that both don't write at the same time).
To make your interrupt run on XGATE you take three steps. I'll show you where this happens in the SCI example since I know you have it. (This is based on CodeWarrior)
1. Send the interrupt to the XGATE
This is done by the ROUTE_INTERRUPT macro at line 32 in main.c.
If you want XGATE to handle the interrupts from port P change this to
ROUTE_INTERRUPT(PORTP_VEC, 0x81);
and define PORTP_VEC as #define PORTP_VEC 0x8E /* vector address= $xx8E */
(You get the vector address from the vector table in the databook)
2. Write the XGATE thread
This is equivalent to the CPU interrupt service routine so you already have it. If it is in C then you should be able to reuse it completely unless you are accessing CPU specific features. Put it in an XGATE file (with .cxgate extension). You could put it in the xgate.cxgate file in the SCI project. Let's assume it is called
interrupt void PortH_thread()
3. Set up the XGATE vector
This is like setting up the CPU vector table. You need to add the name of your XGATE thread into the XGATE vector table in xgate.cxgate. In your case you put PortH_thread at channel 47 in the XGATE vector table. This is clearly marked in the file
{PortH_thread, 0x47}, // Channel 47 - Port P Interrupt
That's it. Now all the Port P interrupts will go to your XGATE thread. You should remove all the code for the SCI otherwise you will get the SCI interrupts as well.
To share the variable do as I suggested above and declare it in one file and access it as extern in the other.
I haven't tried this here but those are the three steps and it should work.