SPI problem

[NZ_Design]

I are trying to get a generic SPI port routine to work.

cPort is being passed with 0

This is what I wont to work but it wont. I have set the port up int the same way and it is fine. If I directly drive the port it works. The port pins do change state but the data is not on the device.

uchar SPI_Proc (uchar cPort, uchar cValue)
{
 while (!(*(char*)SPI_STATUS[cPort] & SPI_TEF));         // Wait for SPTEF set
 *(char*)SPI_DATA[cPort] = cValue;  
 while (!((*(char*)SPI_STATUS[cPort]) & SPI_IF));          // Wait for SPIF set
 return *(char*)SPI_DATA[cPort];
}

If I do this it works.

uchar SPI_Proc (uchar cPort, uchar cValue)
{
 while (!(SPI0SR & SPI_TEF));         // Wait for SPTEF set
 SPI0DR = cValue;
 while (!(SPI0SR & SPI_IF));          // Wait for SPIF set
 return SPI0DR;
}

SPI_Status and SPI_DATA is declearde as such

const SPI_STATUS[] =      {SPI0SR,    SPI0SR,    SPI1SR,    SPI1SR,    SPI2SR,    SPI2SR};
const SPI_DATA[] =        {SPI0DR,    SPI0DR,    SPI1DR,    SPI1DR,    SPI2DR,    SPI2DR};

SPI_TEF = 0x20

SPI_IF = 0x80

other lines decleared the same taht work are

const SPICTRL1[] =        {SPI0CR1,   SPI0CR1,   SPI1CR1,   SPI1CR1,   SPI2CR1,   SPI2CR1};
const SPICTRL2[] =        {SPI0CR2,   SPI0CR2,   SPI1CR2,   SPI1CR2,   SPI2CR2,   SPI2CR2};
const SPIBAUD[] =         {SPI0BR,    SPI0BR,    SPI1BR,    SPI1BR,    SPI2BR,    SPI2BR};
 *(char*)SPICTRL1[cPort] = 0x50;                   // Bit 7 - SPI Interrupts Disabled
                                         // Bit 6 - SPI port pins enable
                                          // Bit 5 - SPI transmit interrupt disable
                                          // Bit 4 - SPI in Master mode
                                          // Bit 3 - SPI Clock polarity (SCLK idels low)
                                          // Bit 2 - SPI Clock Phase (sclk issued halfway through start of transfer)
                                           // Bit 1 - SPI Slave sellect enable. (SS Disabled)
                                          // Bit 0 - SPI LSB first enabled. (MSB).

 *(char*)SPIBAUD[cPort] = 0x00;                   // 12 Mhz
 *(char*)SPICTRL2[cPort] = 0x00;                   // Bit 4 - SPI MODFEN set.
                                        // Bit 3 - Bidir buffer enable bit (disabled)
                                        // Bit 2 - CPHA SPI Clock phas bit.
                                         // Bit 1 - SPI operates normmally in wait mode.
                                          // Bit 0 - SPI Configeration. (normal mode).

Why not this 2.

[Lundin]

The function looks ok, but you should use unsigned char or your own 8-bit integer type, since char may or may not be signed by default.

const SPI_Status[]

This will declare an array of 16-bit integers. You will fill it with the register values as they are out of reset. What you want is an array of pointers to 8-bit integers.


I would write a generic algorithm like this:
(this is for SCI, but it works in the same way for SPI, CAN, whatever)

typedef volatile unsigned char* SCI_Type;

#define SCI0 (&SCI0BDH)
#define SCI1 (&SCI1BDH)

#define reg_SCIBDH(var) (*((SCI_Type)var + 0)) /* SCI Baud Rate Register High */
#define reg_SCIBDL(var) (*((SCI_Type)var + 1)) /* SCI Baud Rate Register Low */
#define reg_SCICR1(var) (*((SCI_Type)var + 2)) /* SCI Control Register1 */
#define reg_SCICR2(var) (*((SCI_Type)var + 3)) /* SCI Control Register 2 */
#define reg_SCISR1(var) (*((SCI_Type)var + 4)) /* SCI Status Register 1 */
#define reg_SCISR2(var) (*((SCI_Type)var + 5)) /* SCI Status Register 2 */
#define reg_SCIDRH(var) (*((SCI_Type)var + 6)) /* SCI Data Register High */
#define reg_SCIDRL(var) (*((SCI_Type)var + 7)) /* SCI Data Register Low */


main()
{
...

reg_SCIBDL(SCI0) = something;

myVariable = reg_SCIDRL(SCI0);

}