Daniel Rogers

SPI problem

Discussion created by Daniel Rogers on Nov 30, 2006
Latest reply on Nov 30, 2006 by Daniel Lundin
I are trying to get a generic SPI port routine to work.
 
cPort is being passed with 0
 
 
This is what I wont to work but it wont. I have set the port up int the same way and it is fine. If I directly drive the port it works. The port pins do change state but the data is not on the device.
 
uchar SPI_Proc (uchar cPort, uchar cValue)
{
 while (!(*(char*)SPI_STATUS[cPort] & SPI_TEF));         // Wait for SPTEF set
 *(char*)SPI_DATA[cPort] = cValue;  
 while (!((*(char*)SPI_STATUS[cPort]) & SPI_IF));          // Wait for SPIF set
 return *(char*)SPI_DATA[cPort];
}
If I do this it works.
uchar SPI_Proc (uchar cPort, uchar cValue)
{
 while (!(SPI0SR & SPI_TEF));         // Wait for SPTEF set
 SPI0DR = cValue;
 while (!(SPI0SR & SPI_IF));          // Wait for SPIF set
 return SPI0DR;
}
 
SPI_Status and SPI_DATA is declearde as such
 
const SPI_STATUS[] =      {SPI0SR,    SPI0SR,    SPI1SR,    SPI1SR,    SPI2SR,    SPI2SR};
const SPI_DATA[] =        {SPI0DR,    SPI0DR,    SPI1DR,    SPI1DR,    SPI2DR,    SPI2DR};

SPI_TEF = 0x20
SPI_IF = 0x80
 
other lines decleared the same taht work are
const SPICTRL1[] =        {SPI0CR1,   SPI0CR1,   SPI1CR1,   SPI1CR1,   SPI2CR1,   SPI2CR1};
const SPICTRL2[] =        {SPI0CR2,   SPI0CR2,   SPI1CR2,   SPI1CR2,   SPI2CR2,   SPI2CR2};
const SPIBAUD[] =         {SPI0BR,    SPI0BR,    SPI1BR,    SPI1BR,    SPI2BR,    SPI2BR};
 *(char*)SPICTRL1[cPort] = 0x50;                   // Bit 7 - SPI Interrupts Disabled
                                         // Bit 6 - SPI port pins enable
                                          // Bit 5 - SPI transmit interrupt disable
                                          // Bit 4 - SPI in Master mode
                                          // Bit 3 - SPI Clock polarity (SCLK idels low)
                                          // Bit 2 - SPI Clock Phase (sclk issued halfway through start of transfer)
                                           // Bit 1 - SPI Slave sellect enable. (SS Disabled)
                                          // Bit 0 - SPI LSB first enabled. (MSB).
 *(char*)SPIBAUD[cPort] = 0x00;                   // 12 Mhz
 *(char*)SPICTRL2[cPort] = 0x00;                   // Bit 4 - SPI MODFEN set.
                                        // Bit 3 - Bidir buffer enable bit (disabled)
                                        // Bit 2 - CPHA SPI Clock phas bit.
                                         // Bit 1 - SPI operates normmally in wait mode.
                                          // Bit 0 - SPI Configeration. (normal mode).
Why not this 2.

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