Scott Engel

E128 ATD correct sequence for reading results

Discussion created by Scott Engel on Nov 7, 2006
Latest reply on Nov 14, 2006 by Scott Engel
I'm a bit confused by the explanation of the ATD registers in the data sheet for the MC9S12E128.
Have scaled the program down to scanning only two channels.
DJM  = 1
DSGN = 0
SCAN = 1
MULT = 1
CA, CB, CC, CD = 0
Conversion length is set to 2. Does this mean that each conversion sequence will sample PAD0, then PAD1 then repeat the sequence on the next pass without any manual changing of Analog Input Channel Select code of ATDCTL5?
I need to know the correct sequence of events for reading the result registers.
My original sequence of instructions caused me to always read PAD0 on all channels. Then I stuck in another read of the ATDSTAT0 register before reading the result register for PAD1 to see if the conversion channel was incrementing, though it was not, the reads became correct.
Does this mean I need to read ATDSTAT0 before polling the ccf flag for the next channel. Below is my sequence or do I even need to check the individual ccfs in continuous SCAN mode.
1. Read ATDSTAT0 to see if scf (bit 7) is set,
2. Read PAD0 if the appropriate ccf in ATDSTAT1 is set.
3. Read ATDSTAT0 lower 4 bits (debug) to see if the conversion channel increments.
4. Poll PAD1's ccf until it becomes set, then read the result register.
This worked but I don't understand why. If ATDSTAT0 scf is set, wouldn't that mean that all the channels have been scanned and the results are ALL ready to read?
Eagle Beak