Terry Tian

9S12GC16 EMI Problem

Discussion created by Terry Tian Employee on Oct 31, 2006
Latest reply on Nov 3, 2006 by Terry Tian


I design a dashboard and do EMI test.

The EMI biggest noise points are 49.152MHz73.728MHz98.304MHz.

The bus clock of MCU is 24.567MHz. It's 2, 3, 4 times of bus clock.


the capacitor C19(0.1uF) is one capcitor between VDDPLL and VSSPLL.

When I removed C19, the cluster passed the EMI test.

But I found the system is not stable without C19.


The question is C19 could be removed during production? Is there any risk if removing C19?

I will change Colpitts oscillator to Pierce type and PE7 is connected to VDD to see if this has influcen for EMI.

Do you have any suggestions how to reduce EMI?