SPI EEPROM

[EagleBeak]

I am attempting to communicate with a Microchip 25AA080A, SPI based EERPOM from an MC9S12E128. The code has been pared down to a simple read of the status register instruction. The serial timing of the CS, MOSI and SCK are textbook perfect and far inside the spec of the chip but it won't respond on the serial out pin.

CPOL and CPHA = 0

VCC = 3.4V

Serial Input Voltage High = 3.37V

/WP, /HOLD are tied to VCC

Has anyone had experience with this device?

Thanks,

Eagle Beak

[bigmac]

Hello Eagle Beak,

How are you driving the /CS line?  You cannot use the SPI module generated output in this case - your firmware will need to explicitly control the line.  This is because the /CS line must remain low over multiple bytes sent to the device.

Regards,

Mac

[EagleBeak]

Hi Mac,

The chip select is driven by a 74138 which is solid low, works ok with the SPI DACs. The spec timing minimums are all in nS and I'm operating at 62KHZ, uS range.  Right now I'm not writing any data, just a one byte read-status-register instruction. It's a prototype and the first time I've used this serial EEPROM so before I deemed the chip bad, I wanted to make sure there wasn't some little gotcha that I couldn't comprehend in the data sheet, like perhaps CS being toggled once at startup to wake the chip up and reset it. Maybe some trick with the WP or HOLD inputs.

Thanks,

E. Beak 

[bigmac]

Hello Eagle Beak,

For the EEPROM device, the high-to-low transition of /CS signifies the start of a new command, so it will not work if the line is permanently held low.  The steps to read the status register would be as follows -

1. Set /CS low
2. Send RDSR command byte
3. Send dummy byte - the returned value is the status register value.
4. Set /CS high ready for next command

Regards,

Mac

[EagleBeak]

I've gotten it working now so for the benefit of anyone reading this, there are a couple points I'd like to put out that will save you some time if you are writing the code for the first time, testing the device, i.e. writing then reading.

The device is a 25AA080A from Microchip SPI .

1. You  must enable the write latch prior to every write operation because when you bring /CS high, the latch is cleared. I interpreted the data sheet to mean you enable the latch after a reset and then you're good but the last sentence does state that you must do this.

2. After a write operation you cannot read the part for 5mS as the high voltage write to the memory array is in progress. This can be optimized by polling the WIP (write in progress) bit in the status register until it becomes a zero. Also, if you are writing one byte at a time, you will have to do likewise. /CS going high begins the write operation.

Eagle Beak

[alexod]

There I was spending an half an hour doing this myself yesterday, and if I'd looked here, it would have take 5 minutes.

Just want to add, most of us have a good 'scope to hand, but I have found that that having an SPI analyzer hooked up gives a very fast reassurance to whether you interpreted the protocol correctly.  When setting up a logic analyzer which does not have canned protocols you will be at the mercy of you misinterpreting the spec same as you did when you coded the driver.  A dedicated analyzer may seem to be less flexible, but is less error prone too.

I got a cheap and cheerful SPI and I2C analyzer from Total Phase, called The Beagle.  For a couple hundred bucks I started seeing answers in minutes not hours.