James Peverill

SCI reception problem

Discussion created by James Peverill on Sep 18, 2006
Latest reply on Sep 19, 2006 by MIKE YETSKO
I'm using a MC9S12NE64, and seeing a very odd issue with the SCI. My SCI transmission works fine, but on reception I am seeing the high order bit getting flipped. When I send it characters, every other character has the highest order bit erroneously set. I set the debugger to stop on entrance to the SCI's ISR, so no code has executed before I see the value of the SC0DRL register. I have parity disabled, the data format field set correctly, and the baud rate field is set right. At first I thought it might be a noise issue so I dropped the baud rate down to 9600 but no change. It seems too constant to be noise anyways.

Has anyone else seen this problem? I have gone over all the SCI configuration settings and couldn't find anything suspect. Are there any silicon errata that could be effecting this?

Thanks for any ideas.