MCF5213 and Watchdog timer documentation

Discussion created by Nouchi on Sep 12, 2006
Latest reply on Sep 12, 2006 by Simon Marsden

I want to generate RESET when the watchdog timer reaches timeout period, but the doc chap 10.5.4 says:
"If this periodic servicing action does not occur, the timer times out, resulting in a watchdog timer interrupt or a hardware reset, as programmed, by CWCR[CWRI]"
but table 10.6 says:
"Core watchdog interrupt select.
0 If a time-out occurs, the CWT generates an interrupt to the processor core. The interrupt level for the CWT is programmed in the interrupt control register 7 (ICR7) of INTC0.
1 Reserved. If a one is written undetermined behavior will result.
Note: If a core reset is required, the watchdog interrupt should set the soft reset bit in the interrupt controller."

Where is the truth?

In chapter 10.5.4, they're speaking about CRSR[CWDR], and don't find any reference about this bit in documentation.


Message Edited by BugMan on 2006-09-12 09:39 AM