Hello Hasan,
It sounds like you may not be clearing the interrupt flag before exiting the ISR. You need to write a 1 to the KBACK bit within KBISC register.
Another possibility is that you have selected both edge and level interrupt by setting the KBMOD bit to 1. This would mean that interrupts could repeatedly occur while the key remained pressed (or released if the wrong polarity were selected).
Yet another possibility is that you do not allow for key bounce, and the ISR is re-entered a number of times. A satisfactory way of allowing for de-bounce would be to disable further interrupts for the particular key, before leaving the ISR. Then, within the main loop, allow for a 50-100 millisecond delay before re-enabling interrupts for the key that was pressed. Because of key bounce, you might get interrupts occurring as the key is released, as well as when pressed, but this would depend on the switch characteristics.
Regards,
Mac