/* PIT0 enabled PIT0 timeout period = 1.00 seconds Counter wraps to 0xFFFF when it reaches zero Writing to PMR replaces value in PIT counter when count reaches 0x0000 Interrupt when timer expires is enabled Timer continues to run in DOZE mode Timer continues to run in Debug mode */ /* PCSR0[PRE] = %1001 PCSR0[DOZE] = 0 PCSR0[DBG] = 0 PCSR0[OVW] = 0 PCSR0[PIE] = 1 PCSR0[PIF] = 0 PCSR0[RLD] = 0 PCSR0[EN] = 1 */ MCF_PIT0_PCSR = MCF_PIT_PCSR_PRE(0x9) | MCF_PIT_PCSR_PIE | MCF_PIT_PCSR_EN; /* PMR0[PM] = $e5af */ MCF_PIT0_PMR = MCF_PIT_PMR_PM(0xe5af); /* PIT1 disabled (PCSR1[EN]=0) */ /* PCSR1[PRE] = 0 PCSR1[DOZE] = 0 PCSR1[DBG] = 0 PCSR1[OVW] = 0 PCSR1[PIE] = 0 PCSR1[PIF] = 0 PCSR1[RLD] = 0 PCSR1[EN] = 0 */ MCF_PIT1_PCSR = 0;and change the vector table like this:vector69: .long _my_timer_irq_handler // Source 41: Timer overflowvector6A: .long _irq_handler // Source 42: Pulse accumulator input vector6B: .long _irq_handler // Source 43: Pulse accumulator overflowvector6C: .long _my_timer_irq_handler // Source 44: Timer channel 0vector6D: .long _irq_handler // Source 45: Timer channel 1vector6E: .long _irq_handler // Source 46: Timer channel 2vector6F: .long _irq_handler // Source 47: Timer channel 3vector70: .long _irq_handler // Source 48: LVDvector71: .long _irq_handler // Source 49: ADCA conversion completevector72: .long _irq_handler // Source 50: ADCB conversion completevector73: .long _irq_handler // Source 51: ADC IRQvector74: .long _irq_handler // Source 52: PWM IRQvector75: .long _irq_handler // Source 53: RNGA IRQvector76: .long _irq_handler // Source 54: Reservedvector77: .long _my_timer_irq_handler // Source 55: PIT0 IRQ Flagvector78: .long _irq_handler // Source 56: PIT1 IRQ Flagvector79: .long _irq_handler // Source 57: Reserved vector7A: .long _irq_handler // Source 58: Reservedvector7B: .long _irq_handler // Source 59: SGFM buffer emptyvector7C: .long _irq_handler // Source 60: SGFM command completevector7D: .long _irq_handler // Source 61: Protection violationvector7E: .long _irq_handler // Source 62: Access errorvector7F: .long _my_timer_irq_handler // Source 63: RTC Interrupt
Message Edited by Alban on 2006-09-06 02:24 PM
#define TICK_RESOLUTION 1000 // 1 second TICK// Routine to initialise the Real Time Tick interrupt//#define REQUIRED_MS ((1000/TICK_RESOLUTION)) // The TICK frequency we require in kHz#if TICK_RESOLUTION > 4#if TICK_RESOLUTION > 64#define TICK_DIVIDE (((BUS_CLOCK/2/32768) + REQUIRED_MS/2)/REQUIRED_MS) // the divide ratio required (32k prescaler assumed)#define PIT_PRESCALE PIT_PRESCALE_32K#else#define TICK_DIVIDE (((BUS_CLOCK/2/4096) + REQUIRED_MS/2)/REQUIRED_MS) // the divide ratio required (4k prescaler assumed)#define PIT_PRESCALE PIT_PRESCALE_4K#endif#else#define TICK_DIVIDE (((BUS_CLOCK/2/1048) + REQUIRED_MS/2)/REQUIRED_MS) // the divide ratio required (1k prescaler assumed)#define PIT_PRESCALE PIT_PRESCALE_1K#endifextern void fnStartTick(void){PIT_PCSR_0 = (PIT_PRESCALE | PIT_DBG | PIT_OVW | PIT_PIF | PIT_RLD); // prepare for loadPIT_PMR_0 = TICK_DIVIDE; // load interval valueIC_ICR_0_55 = (INTERRUPT_LEVEL_4 | INTERRUPT_PRIORITY_4); // define interrupts level and priorityIC_IMRH_0 &= ~(PIT_0_PIF_INT_H | MASK_ALL_INT); // unmask interrupt sourcePIT_PCSR_0 = (PIT_PRESCALE | PIT_DBG | PIT_OVW | PIT_PIF | PIT_RLD | PIT_PIE | PIT_EN); // start PIT with interrupt enabled}/**************************** Real Time Clock interrupt ******************************************/__interrupt__ void my_timer_irq_handler(void){PIT_PCSR_0 = (PIT_PRESCALE | PIT_DBG | PIT_OVW | PIT_PIF | PIT_RLD | PIT_PIE | PIT_EN); // Reset interrupt request flag// do other stuff here//////}
Message Edited by Alban on 2006-09-06 02:23 PM