I also found (using the BDM debugger) that the INITIAL state of the chip shows
PTT = 3 and PTIT = 3 and DDRT = 0 (even though all the PORT T pins are open)
I even lifted the pins just to make sure there is no PCB problem.
All the timer registers show 0 (as they should), so PORT T is not set up as a timer / capture pin.