What is bus clock rate on S12X?

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What is bus clock rate on S12X?

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ThomasG
Contributor I
I am using a MC9S12XDP512 on a target board with a 20 MHz oscillator being used as an input on the EXTAL pin.  I am then assuming that I have a Bus Clock of 10 MHz (because of the divide by 2 mechanism in the System Clocks Generator figure of the S12X manual).
 
I do not think I am getting a 10 MHz clock for my Bus Clock because I tried using the MSCAN module and to synchronize it with an external tester, I had to configure the MSCAN as though it had a 1.5 MHz input clock which did not make sense.
 
I am doing no configuration on the PLL or the CRG.  My question is, what should the bus clock frequency be in my example and what, if any, configuration of registers do I need to do on the CRG.
 
Thank you,
 
Thomas Gaffney
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DanielM
Contributor III
Thomas,

since your HW designer did not spot that PE7 must be grounded... Did he spot that the clock signal should only be 2.5Vpp instead of 5Vpp? Just wondering - if wrong, this could lead to reliability problems and failures in the field.

Daniel
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ThomasG
Contributor I
Thank you for the answers.  I found the problem in HW was that the XCLKS asserted low signal was left floating in a default high state instead of being tied to ground.  Sorry for all the questions and appreciate the help.
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ThomasG
Contributor I

Hi,

Sorry, one more question.  I read the chapter on the Pierce oscillator and it looks like the hardware engineer designed the board according to Figure 6-4 on page 277 External Clock Connections.  The XTAL pin is not connected in our design and the EXTAL pin is connected to an ECS brand oscillator.

Is this a problem?  Also, it appears that the VDDPLL and XFC pins are connected according to Figure 1.7 - PLL Loop Filter Connections.  Does this need to be changed if following Figure 6-4?

Thanks in advance for the answer.

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Steve
NXP Employee
NXP Employee
Glad you solved the problem. Following the schematics in the Data Sheet is ok.
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ThomasG
Contributor I
Thank you for the reply.
 
What register do I need to set to operate the MCU in full swing mode.  I cannot find a register bit setting in the CRG module that controls this.  Is it in another section of the MCU.  Thanks.
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Steve
NXP Employee
NXP Employee
Thomas,
 It's a power-up mode selection and depends on the XCLKS pin (normally PE7). Read the Pierce Oscillator chapter for more details. The logic configuration can change between chips so read the Chip Configuration Summary section for the correct logic level (for example for the XDP512 this is on pg57 in Table 1-6).
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Steve
NXP Employee
NXP Employee
Thomas,
   From a 20MHz oscillator you get a 10MHz bus clock.
If you are getting a 1.5MHz clock it sounds like the part is not operating from the external oscillator and instead it is using its internal self-clock mode which runs between 1MHz and 5.5MHz. Check that you have the correct mode selected for the oscillator - you should be selecting full swing mode.
  You can check the bus frequency by going into special single chip mode and looking at the E clock on port E4.
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