I have a valid license.dat file for CodeWarrior 56800/E v7.*. Will this also work for the latest upgrade of the compiler i.e. v8.*???
Or do I have to buy yet another license to get all those bug fixes?
Thanks for replying….
So I guess the answer is “YES”, I do need to purchase a new copy just to get these bug fixes.
Assuming that I have the support contract the cost would be approx $450 USD otherwise it is the full $1495 USD.
That’s amazing considering the change list for v8 (see below), no real added features, just minor optimizations to the compiler (which I would never use as there is enough bugs with the optimizer set to 0) and 32 self admitted bug fixes all because they decided to increment the major version number, not the minor version number. So Metrowerks is making somewhere between $14 to $46 PER BUG to fix their issues that we as the poor customer has had to live with! Even Microsoft isn’t that bad to its customers…
Great Freescale silicon, but horrible development tools… we really need an alternative to Metro”dont”werks.
Another satisfied customer.
Changes in Current Release, compared with version 7.3
New DSC Processor Support in CW stationery and Processor Expert
* Added switch "-map showbyte" to the command line linker. This
option activates the IDE feature with the name
"Annotate Byte Symbols".
* Small change in code-generation at -O0 so that tst on memory
instructions are used instead load to register and tst register
* Fast 32-bit division & reminder routines in runtime support are
used by code-generator
- added MPY+ADD=MAC peephole pattern
* Software pipelining. Software pipelining is a loop transformation
that changes the initial loop so that parts of different iterations
execute at the same time. This scheduling technique exploits
architectural instruction level parallelism. It may also produce
better loop schedules when stalls, hazards or latencies exist
between instructions in initial loop if these can be avoided in the
**Note that DSP56800e architecture provide limited parallelism by
means of parallel move instructions. These limitations narrow down
the applicability of this transformation.
* Stack Sequence Optimization. This transformation replaces several
accesses to adjacent stack locations with a post-increment/-decrement
addressing mode by using an available address register.
* Constant to array reallocation. Constants/large constants encoded in
instructions are stored into an array in data memory and immediate
operands are changed into data memory access using register-indirect,
* CRC linker feature. CRC linker feature is designed to allow execution
of memory integrity checks at runtime over user defined portions of
memory, which can identify unexpected memory writes
(caused by coding errors, unexpected writes, etc.)
* Interprocedural Analysis support. Interprocedural Analysis (IPA) allows
the compiler to generate better and/or smaller code by inspecting more
than just one function or data object at the same time. This technology
is currently mostly used by the inliner. Future compiler versions will
start using this in future releases for more optimizations.
* Instruction scheduling optimization is enabled by default at optimization
levels greater or equal to 2.
Otherwise #pragma scheduling on/off may be used to control the
* Compiler is able to transform DO-loops in REP-loops when appropriate.
56F800E Fixed issues
* MTWX19861 - Internal compiler error in Freescale BLDC example code.
* MTWX20884 - Compiler crashes when the Create asembly output is
* MTWX18863 - "if" statement with structure reference causing IDE
crash in Hybrid 4.0 -> 7.2.
* MTWX18816 - Register allocation fails.
* MTWX19160 - Code generation error when passing parameters to runtime
* MTWX20132 - accessing arrays/struct/class symbols within inline
assembly didn't work for dalu instructions (only for load/store)
* MTWX20431 - LFR function is now enabled in assembler.
* MTWX20619 - structures at addressses higher than 0x7fff had
* MTWX20635 - An array indexed by an expression containing a shift
right operation generates wrong code.
* MTWX20636 - Return value of pointer type is discarded or misused
inside loops for O3 or O4.
* MTWX19909 - WRITEW keyword in the Linker Commnad File does not
* MTWX19939 - Bitfield uses a wrong address
* MTWX17416 - compiler is highly inefficient in case of bit
manipulations in data structures included in unions
* MTWX19046 - strange behaviour with the DSPE Compiler and runtime
routine. Bug was fixed in runtime ARTDIVREC_S32_01.asm
* MTWX19375 - reserve a block of memory with size 0x20000. The values
F_dataToFlash and F_prepData have got same addresses
* MTWX19724 - the instruction . = ALIGN(2) in command file *.cmd
* MTWX19743 - the tfr+use peephole does not check for creating illegal
instructions when propagating register info
* MTWX19744 - xMAP contains incorrect information on placing of byte
variables in memory
* MTWX19747 - internal compiler error while executing in file
'PCodeInfo.c' line: 4734
(compiling 'FReadArr' in 'readcmd.c') readcmd.c line 803 }
* MTWX19763 - Internal compiler error. Fixed in IRO evaluation of
* MTWX19764 - Internal compiler error. Fixed in register allocation
target specific module
* MTWX19766 - problem to calculate the offset of member of the
* MTWX19849 - parameter is not correctly passed to the function
* MTWX19859 - incorrect addressing to a structure's element
* MTWX19862 - PFM read function written in assembler will not compile.
It does not like moving a long integer to register R0
* MTWX2417 - Suggestion for enhancement on ptimization of arrays
* MTWX19188 - Internal Compiler Error in ExpandPCode.c
* MTWX19189 - Internal Compiler Error in LoopGen.c
* MTWX19244 - code generation bug as 'logical shift' is used instead
* MTWX2474 - Suggestion for enhancement to reuse values on registers
* MTWX18489 - CW 7.0 disappears from desktop during a build operation.
This happens after removing debug option (dot) from one file and
trying to build.
Retrieving data ...