Maik Siebrand

MC9S12UF32 Speed Problems, please help

Discussion created by Maik Siebrand on Jul 19, 2006
Latest reply on Jul 21, 2006 by Maik Siebrand
Hello,

I need to have an Timer with 1Mhz. In this 1Mhz period I want do do something. That means the clock must be more than 1Mhz. I tested to toggle PORTB in an loop. Nothing else than this toggle. And on my osscilloscope I see 430Khz that means 1 operation will be operated at nearly 1Mhz. Didn't it have to be 12Mhz? The standart CLK of this MCU is 12Mhz or am I wrong?

And I should also be able to use the 60Mhz PLL Clock of the USB (PHY).

I tried many things like this:


CLKSEL = 0; // select OSC clock first, (PLLSEL = 0)

SYNR = 29; // Clock synthesizer divider (from VCO)
REFDV = 11; // Reference Clock source divider (from OSC)

asm{
nop
nop
nop
nop
};

PLLCTL_CME = 1;
PLLCTL_PLLON = 1;
PLLCTL_AUTO = 1;
PLLCTL_SCME = 1;

// Wait until PLL is locked
while (!CRGFLG_LOCK);

// Switch the SYSCLK to PLL Clk.
CLKSEL_PLLSEL = 1;


seen in the demo programm thumb drive or card reader. In these programms it is commented out, but in the doku it says it is right to to it like that.

It doesn't come out of the while and without it the speed is just slower. And the debugger stops at REFDV = 29 (or other than 0 values) but the programm runs. Just the debugger stops.

I hope someone has already experience with this board and speeds faster than the 12MHz it should have or the 1Mhz it have. Or some good explanation why one operation needs nearly 30 clocks.



Thanks

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