Hello Tomahawk,
As SPI master or slave? The solutions would be quite different - master is simpler.
Regards,
Mac
Message Edited by Tomahawk on 2006-07-25 09:54 AM
Hello Tomahawk,
Firstly, there seems to be a little confusion with the SPI operation.
I am not sure what your slave device is, but as an example, assume you wish to read data from a SPI compatible EEPROM. The following steps would typically be involved.
Send READ command - ignore return
Send first address byte - ignore return
Send second address byte - ignore return
Send dummy byte - first data byte returned
Send dummy byte - second data byte returned
etc.
When initialising the SPI module as a master you will need to match the CPOL and CPHA parameters to the requirements of the slave device. Whether or not you need to de-activate and then re-activate the /SS signal after each byte will also depend on the slave requirements. Provided a relatively fast SPI clock rate is selected, it is usually not necessary to use SPI interrupts for a master. This is not the case for the MCU operating as a slave.
For each master SPI transaction, you need to write a byte to SPDR, and a short while later you will have received a returned byte from the SPI slave. So the SPI function might be similar to the following code, but does not include control of the /SS line, that may need to be added.
byte SPI_proc (byte data)
{
while (!SPSCR_SPTE); /* Wait for Tx buffer empty */
SPDR = data; /* Send byte */
while (!SPSCR_SPRF); /* Wait for Rx buffer full */
return (SPDR); /* Received byte value */
}
For the EEPROM example given above -
SPI_proc (READ_CMD);
SPI_proc (address1);
SPI_proc (address2);
value1 = SPI_proc (0);
value2 = SPI_proc (0);
Regards,
Mac
Hello Tomahawk,
I could be more specific if I knew what slave device you are using.
I can only repeat that I have never found it necessary to use interrupts for master operation. Typically, I would use SPI when I require serial EEPROM, but more often I use SPI for communicating with shift register chains, both parallel input and parallel output, for the purpose of I/O expansion.
Since I have been able to use a fast SPI clock rate, that each data transaction takes a few microseconds to complete has not been an issue for me.
Regards,
Mac
Hello Tomahawk,
For the accelerometer device, I guess you are already aware of the settings CPHA = 1, CPOL =1 as the requirement. The data sheet is rather confusing when it identifies the bit associated with the first clock pulse as "bit 0". SPI is normally MS bit first, and this matches the data sent to and received from SPDR. For the first send byte, the R/W bit is therefore the MS bit of the address byte.
For the read/write protocol, the following sequence would apply -
Enable /CS
Send address byte, ignore return byte
Send input data, return byte is the output data
Disable /CS
I would also suggest fitting an external pull-up resistor for MISO line, say 10k, since it appears that SPDO pin of the device is high-Z for some of the time.
Regards,
Mac